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7733 Scheda tecnica(PDF) 572 Page - Renesas Technology Corp |
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7733 Scheda tecnica(HTML) 572 Page - Renesas Technology Corp |
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572 / 940 page ![]() APPENDIX 7733 Group User’s Manual 21-24 Appendix 3. Control registers Timer Bi mode register Timer Bi register b7 b0 b7 b0 (b15) (b8) Timer B0 register (addresses 5116, 5016) Timer B1 register (addresses 5316, 5216) Timer B2 register (addresses 5516, 5416) Functions Bit At reset RW 15 to 0 Values 000016 to FFFF16 can be set. Assuming that the set value = n, counter divides the count source frequency by (n + 1). At reading this register, the counter value is read out. Un- defined RW RW RW RW RW RW RW RW Bit 7 4 Must be fixed to “0” (i = 0). 3 1 Bit name At reset 0 0 0 0 Un- defined 0 0 RW Functions b7 b6 b5 b4 b3 b2 b1 b0 Timer Bi mode register (i = 0 to 2) (addresses 5B16 to 5D16) 0 0: Timer mode 0 1: Event counter mode 1 0: Pulse period/Pulse width measurement mode 1 1: Do not select. b1 b0 2 These bits have different functions according to the operating mode. 0 Operating mode selection bits 6 Note: In the timer and event counter modes, bit 5 is ignored and undefined at reading. 5 These bits have different functions according to the operating mode. Not implemented (i = 1, 2). 0 — Un- defined RO (Note) |
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