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AM1808AZCED3 Scheda tecnica(PDF) 124 Page - Texas Instruments |
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AM1808AZCED3 Scheda tecnica(HTML) 124 Page - Texas Instruments |
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124 / 264 page  START XMIT Valid Valid Valid END MMCSD_CLK MMCSD_CMD 13 7 10 9 13 13 13 START XMIT Valid Valid Valid END MMCSD_CLK MMCSD_CMD 10 9 7 1 2 START D0 D1 Dx END MMCSD_CLK MMCSD_DATx 7 14 14 10 9 14 14 AM1808 SPRS653A – FEBRUARY 2010 – REVISED APRIL 2010 www.ti.com 6.13.3 MMC/SD Electrical Data/Timing Table 6-40 through Table 6-41 assume testing over recommended operating conditions. Table 6-40. Timing Requirements for MMC/SD (see Figure 6-25 and Figure 6-27) 1.3V, 1.2V 1.1V 1.0V NO. PARAMETER UNIT MIN MAX MIN MAX MIN MAX 1 tsu(CMDV-CLKH) Setup time, MMCSD_CMD valid before MMCSD_CLK high 4 4 6 ns 2 th(CLKH-CMDV) Hold time, MMCSD_CMD valid after MMCSD_CLK high 2.5 2.5 2.5 ns 3 tsu(DATV-CLKH) Setup time, MMCSD_DATx valid before MMCSD_CLK high 4.5 5 6 ns 4 th(CLKH-DATV) Hold time, MMCSD_DATx valid after MMCSD_CLK high 2.5 2.5 2.5 ns Table 6-41. Switching Characteristics for MMC/SD (see Figure 6-24 through Figure 6-27) 1.3V, 1.2V 1.1V 1.0V NO. PARAMETER UNIT MIN MAX MIN MAX MIN MAX 7 f(CLK) Operating frequency, MMCSD_CLK 0 52 0 50 0 25 MHz 8 f(CLK_ID) Identification mode frequency, MMCSD_CLK 0 400 0 400 0 400 KHz 9 tW(CLKL) Pulse width, MMCSD_CLK low 6.5 6.5 10 ns 10 tW(CLKH) Pulse width, MMCSD_CLK high 6.5 6.5 10 ns 11 tr(CLK) Rise time, MMCSD_CLK 3 3 10 ns 12 tf(CLK) Fall time, MMCSD_CLK 3 3 10 ns 13 td(CLKL-CMD) Delay time, MMCSD_CLK low to MMCSD_CMD transition -4 2.5 -4 3 -4 4 ns 14 td(CLKL-DAT) Delay time, MMCSD_CLK low to MMCSD_DATx transition -4 3.3 -4 3.5 -4 4 ns Figure 6-24. MMC/SD Host Command Timing Figure 6-25. MMC/SD Card Response Timing Figure 6-26. MMC/SD Host Write Timing 124 Peripheral Information and Electrical Specifications Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): AM1808 |
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