Motore di ricerca datesheet componenti elettronici
  Italian  ▼
ALLDATASHEETIT.COM

X  

Preview PDF HTML

AM1808AZCED3 Scheda tecnica(PDF) 137 Page - Texas Instruments

Il numero della parte AM1808AZCED3
Spiegazioni elettronici  AM1808 ARM Microprocessor
PDF  264 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
Logo TI - Texas Instruments

AM1808AZCED3 Scheda tecnica(HTML) 137 Page - Texas Instruments

Back Button AM1808AZCED3 Datasheet HTML 133Page - Texas Instruments AM1808AZCED3 Datasheet HTML 134Page - Texas Instruments AM1808AZCED3 Datasheet HTML 135Page - Texas Instruments AM1808AZCED3 Datasheet HTML 136Page - Texas Instruments AM1808AZCED3 Datasheet HTML 137Page - Texas Instruments AM1808AZCED3 Datasheet HTML 138Page - Texas Instruments AM1808AZCED3 Datasheet HTML 139Page - Texas Instruments AM1808AZCED3 Datasheet HTML 140Page - Texas Instruments AM1808AZCED3 Datasheet HTML 141Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 137 / 264 page
background image
AM1808
www.ti.com
SPRS653A – FEBRUARY 2010 – REVISED APRIL 2010
Table 6-54. Switching Characteristics for McASP0 (1.3V, 1.2V, 1.1V)(1)
1.3V, 1.2V
1.1V
NO.
PARAMETER
UNIT
MIN
MAX
MIN
MAX
9
tc(AHCLKRX)
Cycle time, AHCLKR/X
25
28
ns
10
tw(AHCLKRX)
Pulse duration, AHCLKR/X high or low
AH – 2.5(2)
AH – 2.5(2)
ns
11
tc(ACLKRX)
Cycle time, ACLKR/X
ACLKR/X int
25(3) (4)
28(3) (4)
ns
12
tw(ACLKRX)
Pulse duration, ACLKR/X high or low
ACLKR/X int
A – 2.5(5)
A – 2.5(5)
ns
ACLKR/X int
-1
6
-1
8
ns
Delay time, ACLKR/X transmit edge to
13
td(ACLKRX-AFSRX)
ACLKR/X ext input
2
13.5
2
14.5
ns
AFSX/R output valid(6)
ACLKR/X ext output
2
13.5
2
14.5
ns
ACLKR/X int
-1
6
-1
8
ns
Delay time, ACLKX transmit edge to
14
td(ACLKX-AXRV)
ACLKR/X ext input
2
13.5
2
15
ns
AXR output valid
ACLKR/X ext output
2
13.5
2
15
ns
Disable time, ACLKR/X transmit edge to
ACLKR/X int
0
6
0
8
ns
15
tdis(ACLKX-AXRHZ)
AXR high impedance following last data
ACLKR/X ext
2
13.5
2
15
ns
bit
(1)
McASP0 ACLKX0 internal – ACLKXCTL.CLKXM = 1, PDIR.ACLKX = 1
ACLKX0 external input – McASP0 ACLKXCTL.CLKXM = 0, PDIR.ACLKX = 0
ACLKX0 external output – McASP0ACLKXCTL.CLKXM = 0, PDIR.ACLKX = 1
ACLKR0 internal – McASP0 ACLKR0CTL.CLKRM = 1, PDIR.ACLKR =1
ACLKR0 external input – McASP0 ACLKRCTL.CLKRM = 0, PDIR.ACLKR = 0
ACLKR0 external output – McASP0 ACLKRCTL.CLKRM = 0, PDIR.ACLKR = 1
(2)
AH = (AHCLKR/X period)/2 in ns. For example, when AHCLKR/X period is 25 ns, use AH = 12.5 ns.
(3)
P = SYSCLK2 period
(4)
This timing is limited by the timing shown or 2P, whichever is greater.
(5)
A = (ACLKR/X period)/2 in ns. For example, when AHCLKR/X period is 25 ns, use AH = 12.5 ns.
(6)
McASP0 ACLKXCTL.ASYNC=1: Receiver is clocked by its own ACLKR0
Table 6-55. Switching Characteristics for McASP0 (1.0V)(1)
1.0V
NO.
PARAMETER
UNIT
MIN
MAX
9
tc(AHCLKRX)
Cycle time, AHCLKR/X
35
ns
10
tw(AHCLKRX)
Pulse duration, AHCLKR/X high or low
AH – 2.5(2)
ns
11
tc(ACLKRX)
Cycle time, ACLKR/X
ACLKR/X int
35(3) (4)
ns
12
tw(ACLKRX)
Pulse duration, ACLKR/X high or low
ACLKR/X int
A – 2.5(5)
ns
ACLKR/X int
-0.5
10
ns
13
td(ACLKRX-AFSRX)
Delay time, ACLKR/X transmit edge to AFSX/R output valid(6) ACLKR/X ext input
2
19
ns
ACLKR/X ext output
2
19
ns
ACLKR/X int
-0.5
10
ns
14
td(ACLKX-AXRV)
Delay time, ACLKX transmit edge to AXR output valid
ACLKR/X ext input
2
19
ns
ACLKR/X ext output
2
19
ns
ACLKR/X int
0
10
ns
Disable time, ACLKR/X transmit edge to AXR high
15
tdis(ACLKX-AXRHZ)
impedance following last data bit
ACLKR/X ext
2
19
ns
(1)
McASP0 ACLKX0 internal – ACLKXCTL.CLKXM = 1, PDIR.ACLKX = 1
ACLKX0 external input – McASP0 ACLKXCTL.CLKXM = 0, PDIR.ACLKX = 0
ACLKX0 external output – McASP0ACLKXCTL.CLKXM = 0, PDIR.ACLKX = 1
ACLKR0 internal – McASP0 ACLKR0CTL.CLKRM = 1, PDIR.ACLKR =1
ACLKR0 external input – McASP0 ACLKRCTL.CLKRM = 0, PDIR.ACLKR = 0
ACLKR0 external output – McASP0 ACLKRCTL.CLKRM = 0, PDIR.ACLKR = 1
(2)
AH = (AHCLKR/X period)/2 in ns. For example, when AHCLKR/X period is 25 ns, use AH = 12.5 ns.
(3)
P = SYSCLK2 period
(4)
This timing is limited by the timing shown or 2P, whichever is greater.
(5)
A = (ACLKR/X period)/2 in ns. For example, when AHCLKR/X period is 25 ns, use AH = 12.5 ns.
(6)
McASP0 ACLKXCTL.ASYNC=1: Receiver is clocked by its own ACLKR0
Copyright © 2010, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications
137
Submit Documentation Feedback
Product Folder Link(s): AM1808



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Scheda tecnica Scarica

Go To PDF Page


Link URL



Lei ha avuto il aiuto da alldatasheet?  [ DONATE ] 

Di alldatasheet   |   Richest di pubblicita   |   contatti   |   Privacy Policy   |   Collegamento alla scheda tecnica    |   scambio Link   |   Ricerca produttore
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com