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TMS570LS Scheda tecnica(PDF) 34 Page - Texas Instruments |
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TMS570LS Scheda tecnica(HTML) 34 Page - Texas Instruments |
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34 / 107 page ![]() TMS570LS20206-EP, TMS570LS20216-EP SPNS209A – JUNE 2012 – REVISED AUGUST 2012 www.ti.com Table 2-9. Terminal Functions (continued) Terminal Internal TMS570LS20216 TMS570LS20206 Type pullup/p Description Name ulldown 337 144 337 144 Supply Voltage Digital I/O (3.3V) and Core (1.5V) VCCIO F6 1 F6 1 VCCIO F7 15 F7 15 VCCIO F11 40 F11 40 VCCIO F12 90 F12 90 VCCIO F13 108 F13 108 VCCIO F14 119 F14 119 VCCIO G6 132 G6 132 VCCIO G14 G14 VCCIO H6 H6 VCCIO H14 H14 VCCIO J6 J6 Digital I/O supply pins Note: All VccIO pads are connected to VCCIO L14 L14 3.3V the BGA packages through the package PWR VCCIO M6 M6 substrate. There is not a direct ball to bond pad connection for this supply. VCCIO M14 M14 VCCIO N6 N6 VCCIO N14 N14 VCCIO P6 P6 VCCIO P7 P7 VCCIO P8 P8 VCCIO P9 P9 VCCIO P12 P12 VCCIO P13 P13 VCCIO P14 P14 VCCIO VCC F9 19 F9 19 VCC F10 31 F10 31 VCC H10 37 H10 37 VCC J14 47 J14 47 VCC K6 87 K6 87 Digital Core supply pins VCC K8 104 K8 104 Note: All Vcc pads are connected to the 1.5V VCC K12 114 K12 114 BGA packages through the package PWR substrate. There is not a direct ball to VCC K14 135 K14 135 bond pad connection for this supply. VCC L6 L6 VCC M10 M10 VCC P10 P10 VCC P11 P11 VCC 34 Device Overview Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TMS570LS20206-EP TMS570LS20216-EP |
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