TMS570LS datasheet(52/107 Pages) TI1

Il numero della parte	TMS570LS

Spiegazioni elettronici	Series 16/32-BIT RISC Flash Microcontroller

PDF	107 Pages

Scroll/Zoom	100%

Produttore elettronici	TI1 [Texas Instruments]

Homepage	http://www.ti.com

Logo

52 / 107 page

ETM

DMM TAP

RTP TAP

TDI

TDO

DAP

TPIU

debug scan chain #0

debug scan chain #1

CPU

POM

DMM

RTP

boundary scan interface

CoreSight

Boundary

Scan

TMS570LS20206-EP, TMS570LS20216-EP

SPNS209A – JUNE 2012 – REVISED AUGUST 2012

www.ti.com

4.8

Debug Scan Chains

The device contains an ICEPICK module to access the debug scan chains. Debug scan chain #0 handles

the access to the CPU, to the ETM-R4 (External Trace Macrocell), to the POM (Parameter Overlay

Module) and to the TPIU (Test Port Interface Unit). Debug scan chain #1 handles the access to the Ram

Trace Port (RTP) and the Data Modification Module (DMM) which each incorporate a dedicated TAP (Test

Access Port) controller. Each module is selected via its scan chain number. The IcePick scan ID is

0x80206D05, which is the same number as the device ID.

Figure 4-1. Debug Scan Chains

4.8.1

JTAG

The 32bit JTAG ID code for this device is 0x0B7B302F.

Peripherals

Submit Documentation Feedback

Product Folder Link(s): TMS570LS20206-EP TMS570LS20216-EP

TMS570LS Scheda tecnica(PDF) 52 Page - Texas Instruments