ADIN1101CCPZ-R7 datasheet(47/79 Pages) AD

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Data Sheet

ADIN1101

analog.com

Rev. A | 47 of 79

Table 49. Bit Descriptions for PMA_PMD_CNTRL1

Bits

Bit Name

Description

Reset

Access

PMA_SFT_RST

PMA Software Reset. The PMA software reset bit allows the chip to be reset. When this bit is set, the

chip fully initializes, almost equivalent to a hardware reset. This bit is self clearing and returns a value

of 1 when a reset is in progress. Otherwise, it returns a value of 0.

0x0

R/W SC

[14:12]

RESERVED

Reserved.

0x0

PMA_SFT_PD

PMA Software Power-Down. The PMA software power-down register puts the chip in a lower power

mode. In this mode, most of the circuitry is switched off. However, MDIO access to all registers is still

possible. The default value for this register is configurable via the RX_DV/SWPD_EN pin, which allows

the chip to be held in power-down mode until an appropriate software initialization is performed.

0x0

R/W

[10:1]

RESERVED

Reserved.

0x0

LB_PMA_LOC_EN

Enables PMA Local Loopback. When this bit is set to 1, the PMA accepts data on the transmit path

and returns it on the receive path. When this bit is set to 0, the PMA works in normal mode.

0x0

R/W

PMA/PMD Status 1 Register

Device Address: 0x01; Register Address: 0x0001, Reset: 0x0002, Name: PMA_PMD_STAT1

This address corresponds to the PMA/PMD Status Register 1 specified in Clause 45.2.1.2 of Standard 802.3.

Table 50. Bit Descriptions for PMA_PMD_STAT1

Bits

Bit Name

Description

Reset

Access

[15:3]

RESERVED

Reserved.

0x0

PMA_LINK_STAT_OK_LL

PMA Link Status. When read as 1, this bit indicates that the link is up. When read as 0, this bit

indicates that the link has dropped since the last time the bit was read.

0x0

R LL

PMA_SFT_PD_ABLE

PMA Software Power-Down Able. Indicates that the PMA supports software power-down.

0x1

RESERVED

Reserved.

0x0

PMA/PMD MMD Devices in Package 1 Register

Device Address: 0x01; Register Address: 0x0005, Reset: 0x008B, Name: PMA_PMD_DEVS_IN_PKG1

Table 51. Bit Descriptions for PMA_PMD_DEVS_IN_PKG1

Bits

Bit Name

Description

Reset

Access

[15:0]

PMA_PMD_DEVS_IN_PKG1

PMA/PMD MMD Devices in Package 1. Clause 22 registers and PMA/PMD, PCS, and

autonegotiation MMDs are present.

0x8B

PMA/PMD MMD Devices in Package 2 Register

Device Address: 0x01; Register Address: 0x0006, Reset: 0xC000, Name: PMA_PMD_DEVS_IN_PKG2

Table 52. Bit Descriptions for PMA_PMD_DEVS_IN_PKG2

Bits

Bit Name

Description

Reset

Access

[15:0]

PMA_PMD_DEVS_IN_PKG2

PMA/PMD MMD Devices in Package 2. Vendor Specific Device 1 and Vendor Specific

Device 2 MMDs are present.

0xC000

PMA/PMD Control 2 Register

Device Address: 0x01; Register Address: 0x0007, Reset: 0x003D, Name: PMA_PMD_CNTRL2

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