ADMV1455BBCZ-R7 datasheet(70/141 Pages) AD

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Data Sheet

ADMV1455

THEORY OF OPERATION

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NONVOLATILE MEMORY

The ADMV1455 contains a simple nonvolatile memory (NVM) that

is used to store factory calibration values to minimize part to part

variation. The values in the NVM set the chip bias current, trim

the internal ADC, and trim the internal temperature sensor. At chip

power-up, it is recommended to ensure that this NVM has loaded

its values into their correct shadow registers. The NVM is static and

can not be modified by the user.

NVM Health Check

To confirm the NVM values have loaded, use the following NVM

health check instructions:

1. Shadow Register 0x033 by doing the following:

►

Set Register 0x07B to Value 0x33.

►

Read Register 0x07B, it should return 0x33.

►

Read Register 0x07C, it should return a nonzero value,

typically 0x20.

2. Shadow Register 0x034 by doing the following:

►

Set Register 0x07B to Value 0x34.

►

Read Register 0x07B, it should return 0x34.

►

Read Register 0x07C, it should return a nonzero value,

typically 0x20.

3. Shadow Register 0x037 by doing the following:

►

Set Register 0x07B to Value 0x37.

►

Read Register 0x07B, it should return 0x37.

►

Read Register 0x07C, it should return a nonzero value,

typically 0x0D.

4. Shadow Register 0x038 by doing the following:

►

Set Register 0x07B to Value 0x38.

►

Read Register 0x07B, it should return 0x38.

►

Read Register 0x07C, it should return a nonzero value,

typically 0x0D.

If any of the return values are zero, follow the instructions detailed

in the NVM Load Instructions section.

NVM Load Instructions

If any of the return values from Register 0x07C are zero, run the

following NVM load instructions:

1. Set Register 0x078 to Value 0x08.

2. Pause 1ms.

3. Set Register 0x07E to Value 0x40.

4. Pause 1ms.

5. Set Register 0x07E to Value 0x54.

6. Pause 1ms.

7. Set Register 0x078 to Value 0x09.

DIGITAL OVERVIEW

The ADMV1455 contains advanced digital logic that allows for

various methods of configuring each circuit block within the chip.

These methods include simple register configurations, a synchro-

nous LOAD feature, look-up tables (LUTs), logic state machines,

parallel input logic pointers, and general-purpose logic outputs.

The digital logic can be partitioned into two subsections, one for fre-

quency control (filters) and the other for gain control (attenuators).

See Figure 171 and Figure 172 for representative diagrams for

each subsection. When reviewing these diagrams, it may be helpful

to follow from right to left, starting from the items being controlled,

then deciding the input control method.

For the frequency control subsection, the most simplistic way of

configuring the filters and GPO_Fx logic outputs is by using Regis-

ter 0x800 to Register 0x80C. Register 0x2A0 is a bypass register

that allows setting the RF chain LPF value, and this register gives

more resolution than the LPF value in Register 0x802. Similarly,

and this register gives more resolution than the HPF value in Regis-

ter 0x804. Register 0x2A2 is a necessary register that trims the IF

chain BPF corner frequencies. See Table 24 for the recommended

values.

When evaluating the ADMV1455, if there is a plan to implement the

chip to use the LUT to set the filters, then it is recommended to use

use the LUT, then it is advantageous to use Register 0x2A0 and

For the gain control subsection, the most simplistic way of configur-

ing the attenuators and GPO_Gx logic outputs is by using Register

0x28B to Register 0x28E. Register 0x600 to Register 0x603 can

also be used when it is desired to use the LOAD feature.

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