FS26 datasheet(156/156 Pages) NXP

156 / 156 page

NXP Semiconductors

FS26

Safety system basis chip with low power for ASIL D/ASIL B

18.6

VREF: voltage reference ............................... 107

18.7

TRK1 and TRK2: voltage tracking

regulators .......................................................109

System enhancement functions .................111

19.1

Clock management of the Main domain ........ 111

19.1.1

Manual frequency tuning ............................... 111

19.1.2

Phase shifting ................................................ 112

19.1.3

Spread spectrum ........................................... 112

19.2

Analog multiplexer: AMUX .............................113

19.2.1

AMUX channel selection ............................... 113

19.3

System I/O pins ............................................. 115

19.3.1

WAKE1 and WAKE2: wake-up inputs ............115

19.3.2

GPIO1 and GPIO2: general purpose input/

output .............................................................116

19.3.2.1 GPIO input configuration ............................... 117

19.3.2.2 GPIO active high mode ................................. 117

19.3.2.3 GPIO active low mode ...................................120

19.3.2.4 VCORE_PGOOD: VCORE power good

status ............................................................. 121

19.3.2.5 GPIO electrical characteristics .......................122

19.3.3

INTB: interrupt output .................................... 123

19.4

LDT: long duration timer ................................ 125

19.4.1

LDT characteristics ........................................126

19.4.2

Calibration procedure .................................... 127

19.4.3

LDT functions ................................................ 127

19.4.4

LDT operation ................................................128

OTP and Debug mode .................................130

20.1

OTP mode flowchart ......................................131

20.2

Debug mode flowchart ...................................132

Application schematics ...............................134

21.1

Front-end configuration ..................................134

21.2

Back-end configuration .................................. 135

OTP configurations ..................................... 136

Packaging .....................................................141

23.1

Package mechanical dimensions ...................141

23.2

Package outline ............................................. 142

References ....................................................148

Revision history ...........................................149

Legal information .........................................150

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section 'Legal information'.

For more information, please visit: https://www.nxp.com

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Date of release: 12 December 2025

Document identifier: FS26_SDS

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