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FS26 Scheda tecnica(PDF) 66 Page - NXP Semiconductors |
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FS26 Scheda tecnica(HTML) 66 Page - NXP Semiconductors |
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66 / 156 page ![]() NXP Semiconductors FS26 Safety system basis chip with low power for ASIL D/ASIL B Bit 7 6 5 4 3 2 1 0 Write MEM0[7:0] Read MEM0[7:0] Reset 0 0 0 0 0 0 0 0 Go to main register map Bit Symbol Description Free 16 bits for application data storage MEM0 stored data 15 to 0 MEM0[15:0] Reset on power-on reset (POR_M) Table 65. M_MEMORY0 register bit description 16.2.26 M_MEMORY1 Bit 15 14 13 12 11 10 9 8 Write MEM1[15:8] Read MEM1[15:8] Reset 0 0 0 0 0 0 0 0 Table 66. M_MEMORY1 register bit allocation Bit 7 6 5 4 3 2 1 0 Write MEM1[7:0] Read MEM1[7:0] Reset 0 0 0 0 0 0 0 0 Go to main register map Bit Symbol Description Free 16 bits for application data storage MEM1 stored data 15 to 0 MEM1[15:0] Reset on power-on reset (POR_M) Table 67. M_MEMORY1 register bit description FS26_SDS All information provided in this document is subject to legal disclaimers. © 2025 NXP B.V. All rights reserved. Product short data sheet Rev. 6.0 — 12 December 2025 Document feedback 66 / 156 |
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