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FS26 Scheda tecnica(PDF) 77 Page - NXP Semiconductors |
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FS26 Scheda tecnica(HTML) 77 Page - NXP Semiconductors |
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77 / 156 page ![]() NXP Semiconductors FS26 Safety system basis chip with low power for ASIL D/ASIL B Bit Bit Group Name Description Value Settings 18h 4.40 V 19h 4.45 V 1Ah 4.50 V 1Bh 4.55 V 1Ch 4.60 V 1Dh 4.65 V 1Eh 4.70 V 1Fh 4.75 V 20h 4.80 V 21h 4.85 V 22h 4.90 V 23h 4.95 V 24h 5.00 V 25h 5.05 V 26h 5.10 V 27h 5.15 V 28h 5.20 V 29h 5.25 V 2Ah 5.30 V 2Bh 5.35 V Table 81. OTP_VPRE_VOLT2 register bit description...continued Go to main OTP configuration map 17.2.14 OTP_VPRE_VOLT3 Bit Bit Group Name Description Value Settings 0h 100 µs 1h 1 ms 2h 2 ms 7 to 6 VPRE_PDWN_DLY_OTP[1:0] VPRE power down delay 3h 5 ms 0Ah 3.70 V 0Bh 3.75 V 0Ch 3.80 V 0Dh 3.85 V 0Eh 3.90 V 0Fh 3.95 V 10h 4.00 V 11h 4.05 V 12h 4.10 V 13h 4.15 V 14h 4.20 V 15h 4.25 V 16h 4.30 V 17h 4.35 V 5 to 0 VPRE_BOS_OTP[5:0] VPRE transition voltage 18h 4.40 V Table 82. OTP_VPRE_VOLT3 register bit description FS26_SDS All information provided in this document is subject to legal disclaimers. © 2025 NXP B.V. All rights reserved. Product short data sheet Rev. 6.0 — 12 December 2025 Document feedback 77 / 156 |
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