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FS26 Scheda tecnica(PDF) 54 Page - NXP Semiconductors

Il numero della parte FS26
Spiegazioni elettronici  Safety system basis chip with low power for ASIL D/ASIL B
PDF  156 Pages
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Produttore elettronici  NXP [NXP Semiconductors]
Homepage  http://www.nxp.com
Logo NXP - NXP Semiconductors

FS26 Scheda tecnica(HTML) 54 Page - NXP Semiconductors

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NXP Semiconductors
FS26
Safety system basis chip with low power for ASIL D/ASIL B
Bit
7
6
5
4
3
2
1
0
Read
RESERVED
RESERVED
RESERVED
LDT_M
GPIO2_M
GPIO1_M
WK2_M
WK1_M
Reset
0
0
0
0
0
0
0
0
Go to main register map
Bit
Symbol
Value
Description
Inhibit interrupt (INTB pulse) related to LDT_I event
0h
Interrupt NOT MASKED (default)
1h
Interrupt MASKED
4
LDT_M
Reset on power-on reset (POR_M)
Inhibit interrupt (INTB pulse) related to GPIO2_I event
0h
Interrupt NOT MASKED (default)
1h
Interrupt MASKED
3
GPIO2_M
Reset on power-on reset (POR_M)
Inhibit interrupt (INTB pulse) related to GPIO1_I event
0h
Interrupt NOT MASKED (default)
1h
Interrupt MASKED
2
GPIO1_M
Reset on power-on reset (POR_M)
Inhibit interrupt (INTB pulse) related to WK2_I event
0h
Interrupt NOT MASKED (default)
1h
Interrupt MASKED
1
WK2_M
Reset on power-on reset (POR_M)
Inhibit interrupt (INTB pulse) related to WK1_I event
0h
interrupt NOT MASKED (default)
1h
Interrupt MASKED
0
WK1_M
Reset on power-on reset (POR_M)
Table 37. M_WIO_MSK register bit description (default)
16.2.12 M_COM_MSK
Bit
15
14
13
12
11
10
9
8
Write
0
0
0
0
0
0
0
0
Read
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
Reset
0
0
0
0
0
0
0
0
Table 38. M_COM_MSK register bit allocation
Bit
7
6
5
4
3
2
1
0
Write
0
0
0
0
0
MSPI_CRC_M
MSPI_CLK_M
MSPI_REQ_M
Read
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
MSPI_CRC_M
MSPI_CLK_M
MSPI_REQ_M
Reset
0
0
0
0
0
0
0
0
Go to main register map
Bit
Symbol
Value
Description
Inhibit interrupt (INTB pulse) related to MSPI_CRC_I event
0h
Interrupt NOT MASKED
2
MSPI_CRC_M
1h
Interrupt MASKED
Table 39. M_COM_MSK register bit description (default value in bold)
FS26_SDS
All information provided in this document is subject to legal disclaimers.
© 2025 NXP B.V. All rights reserved.
Product short data sheet
Rev. 6.0 — 12 December 2025
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