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FS26 Scheda tecnica(PDF) 123 Page - NXP Semiconductors |
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FS26 Scheda tecnica(HTML) 123 Page - NXP Semiconductors |
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123 / 156 page  NXP Semiconductors FS26 Safety system basis chip with low power for ASIL D/ASIL B TA = –40 °C to 125 °C, unless otherwise specified. VSUP_UVH < VSUP < 36 V, VPRE_PWM + VPRE_HDR < VSUP_PWR < 36 V, unless otherwise specified. All voltages are referenced to ground. Symbol Description Min Typ Max Unit Drop voltage VDROP_GPIO I = 20 mA high-side source I = 2 mA low-side sink — — 0.2 0.2 0.6 0.4 V TSDGPIO1 Thermal shutdown threshold for GPIO1 175 — — °C TSDGPIO1_HYS Thermal shutdown threshold hysteresis for GPIO1 5 — 12 °C Table 120. GPIO electrical characteristics...continued 19.3.3 INTB: interrupt output INTB is an open drain output pin with an internal pull-up to VDDIO. When an internal interrupt occurs, this pin generates a pulse to inform the microcontroller. Main interrupts, listed in Table 121, generate a pulse on INTB, if the flag is cleared, and fail-safe interrupts, listed in Table 122, generate a pulse on INTB even if the flag is already set. Each interrupt can be masked by setting the corresponding inhibit interrupt bit in the M_xxx_MASK and FS_INTB_MASK registers. When the RSTB pin is asserted, interrupts are no longer sent to the MCU until the product goes back to the initialization phase. Table 121 and Table 122 list all interrupt sources that can generate a pulse on the INTB pin. SPI flag Interrupt mask Interrupt flag Corresponding event description TWARN_M TWARN_I Central Temp sensor has crossed the thermal warning threshold on the rising edge GPIO1TSD_M GPIO1TSD_I GPIO1 thermal shutdown event occurred VPRETSD_M VPRETSD_I VPRE thermal shutdown event occurred TRK2TSD_M TRK2TSD_I TRK2 thermal shutdown event occurred TRK1TSD_M TRK1TSD_I TRK1 thermal shutdown event occurred CORETSD_M CORETSD_I VCORE thermal shutdown event occurred LDO2TSD_M LDO2TSD_I LDO2 thermal shutdown event occurred TSD_G LDO1TSD_M LDO1TSD_I LDO1 thermal shutdown event occurred VBSTOV_M VBSTOV_I VBST has crossed VBST_OV_TH on the rising edge VPREUVH_M VPREUVH_I VPRE has crossed VPRE_UVH on the falling edge VBSTOC_M VBSTOC_I VBST overcurrent event occurred VPREOC_M VPREOC_I VPRE overcurrent event occurred TRK2OC_M TRK2OC_I TRK2 overcurrent event occurred TRK1OC_M TRK1OC_I TRK1 overcurrent event occurred COREOC_M COREOC_I VCORE overcurrent event occurred LDO2OC_M LDO2OC_I LDO2 overcurrent event occurred REG_G LDO1OC_M LDO1OC_I LDO1 overcurrent event occurred VBOSUVH_M VBOSUVH_I VBOS has crossed VBOS_UVH on the falling edge VSUPOV_M VSUPOV_I VSUP has crossed VSUP_OV on the rising edge VSUPUV6_M VSUPUV6_I VSUP has crossed VSUP_UV6 on the falling edge VSUP_G VSUPUVH_M VSUPUVH_I VSUP has crossed VSUP_UVH on the falling edge Table 121. List of Interrupt sources from Main logic FS26_SDS All information provided in this document is subject to legal disclaimers. © 2025 NXP B.V. All rights reserved. Product short data sheet Rev. 6.0 — 12 December 2025 Document feedback 123 / 156 |
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