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LMKDB1108FS Scheda tecnica(PDF) 35 Page - Texas Instruments

Il numero della parte LMKDB1108FS
Spiegazioni elettronici  LMKDB11xx PCIe Gen 1 to Gen 7 Ultra Low Jitter LP-HCSL Clock Buffer Family
PDF  133 Pages
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Produttore elettronici  TI2 [Texas Instruments]
Homepage  https://www.ti.com
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LMKDB1108FS Scheda tecnica(HTML) 35 Page - Texas Instruments

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6.9 Typical Characteristics
Figure 6-3. Input Source at 156.25MHz (12kHz - 20MHz)
See Note 1 and 2 in Graph Notes table
Figure 6-4. LMKDB11xx Phase Noise / Output Jitter at
156.25MHz (12kHz - 20MHz)
Table 6-1. Graph Notes
NOTE
(1)
The typical RMS jitter values in the plots show the total output RMS jitter (JOUT) for each frequency and the source clock RMS
jitter (JSOURCE). From these values, the Additive RMS Jitter can be calculated as: JADD = SQRT(JOUT 2 – JSOURCE 2).
(2)
JADD at 156.25MHz = SQRT(33.92- 25.82) = 22.0fs
7 Parameter Measurement Information
LMKDB
100-
LP-HCSL Driver
15 dB loss at 4 GHz
Differential PCB trace
ZDiff = 100
± 10%
High impedance
differential probe
2 pF
2 pF
Figure 7-1. PCIe AC Test Load
2pF
2pF
25.4cm
Differential PCB trace, ZDiff = 85
High impedance
differential probe
LMKDB
85
LP-HCSL Driver
Figure 7-2. DB2000QL AC Test Load
www.ti.com
LMKDB1102, LMKDB1104, LMKDB1104FS, LMKDB1108, LMKDB1108FS
LMKDB1112, LMKDB1120, LMKDB1120FS
SNAS855G – NOVEMBER 2023 – REVISED MAY 2026
Copyright © 2026 Texas Instruments Incorporated
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Product Folder Links: LMKDB1102 LMKDB1104 LMKDB1104FS LMKDB1108 LMKDB1108FS LMKDB1112 LMKDB1120 LMKDB1120FS



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