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LMKDB1108FS Scheda tecnica(PDF) 47 Page - Texas Instruments

Il numero della parte LMKDB1108FS
Spiegazioni elettronici  LMKDB11xx PCIe Gen 1 to Gen 7 Ultra Low Jitter LP-HCSL Clock Buffer Family
PDF  133 Pages
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LMKDB1108FS Scheda tecnica(HTML) 47 Page - Texas Instruments

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9 Register Maps
9.1 LMKDB1120 and LMKDB1120FS Registers
Table 9-1 lists the memory-mapped registers for the LMKDB1120 and LMKDB1120FS registers. All register
offset addresses not listed in Table 9-1 must be considered as reserved locations and the register contents must
not be modified.
Table 9-1. LMKDB1120 and LMKDB1120FS Registers
Offset
Acronym
Register Name
Section
0h
R0
Output Enable Control for CLK16 through CLK19
Section 9.1.1
1h
R1
Output Enable Control for CLK0 through CLK7
Section 9.1.2
2h
R2
Output Enable Control for CLK8 through CLK15
Section 9.1.3
3h
R3
OE Pin Readback for CLK5 through CLK12
Section 9.1.4
4h
R4
AOD Enable Control and SBI_EN Readback
Section 9.1.5
5h
R5
Device Info
Section 9.1.6
6h
R6
Device Info (cont.)
Section 9.1.7
7h
R7
SMBus Byte Counter
Section 9.1.8
8h
R8
SBI Mask for CLK0 through CLK7
Section 9.1.9
9h
R9
SBI Mask for CLK8 and CLK15
Section 9.1.10
Ah
R10
SBI Mask for CLK16 and CLK19
Section 9.1.11
Bh
R11
Output Slew Rate Select MSB for CLK0 through CLK7
Section 9.1.12
Ch
R12
Output Slew Rate Select MSB for CLK8 through CLK15
Section 9.1.13
Dh
R13
Output Slew Rate Select MSB for CLK16 through CLK19
Section 9.1.14
14h
R20
Output Amplitude
Section 9.1.15
15h
R21
Input Configuration, Save Config in PD, SMB SDATA
Monitoring, and LOS Readback
Section 9.1.16
21h
R33
SBI Mask Readback for CLK0 through CLK7
Section 9.1.17
22h
R34
SBI Mask Readback for CLK8 through CLK15
Section 9.1.18
23h
R35
SBI Mask Readback for CLK16 through CLK19
Section 9.1.19
26h
R38
Non-clearable SMBUS Write Lock
Section 9.1.20
27h
R39
LOS Event Status and Clearable SMBus Write Lock
Section 9.1.21
5Bh
R91
Slew Rate Speed Options 1 and 2 Assignments
Section 9.1.22
5Ch
R92
Slew Rate Speed Options 3 and 4 Assignments
Section 9.1.23
62h
R98
Output Slew Rate Select LSB for CLK0 through CLK7
Section 9.1.24
63h
R99
Output Slew Rate Select LSB for CLK8 through CLK15
Section 9.1.25
64h
R100
Output Slew Rate Select LSB for CLK16 through CLK19
Section 9.1.26
Complex bit access types are encoded to fit into small table cells. Table 9-2 shows the codes that are used for
access types in this section.
Table 9-2. LMKDB1120 and LMKDB1120FS Access
Type Codes
Access Type
Code
Description
Read Type
R
R
Read
RC
R
C
Read
to Clear
Write Type
W
W
Write
www.ti.com
LMKDB1102, LMKDB1104, LMKDB1104FS, LMKDB1108, LMKDB1108FS
LMKDB1112, LMKDB1120, LMKDB1120FS
SNAS855G – NOVEMBER 2023 – REVISED MAY 2026
Copyright © 2026 Texas Instruments Incorporated
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Product Folder Links: LMKDB1102 LMKDB1104 LMKDB1104FS LMKDB1108 LMKDB1108FS LMKDB1112 LMKDB1120 LMKDB1120FS



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