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LMKDB1108FS Scheda tecnica(PDF) 88 Page - Texas Instruments |
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LMKDB1108FS Scheda tecnica(HTML) 88 Page - Texas Instruments |
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88 / 133 page ![]() Table 9-101. R92 Register Field Descriptions Bit Field Type Reset Description 7:4 SLEWRATE_OPT_4 R/W Fh There are four register assignments each storing a slew rate value (chosen out of the 16 available slew rate values). This register bits relate to the 4th option. Go to Programmable Output Slew Rate section for more information. 0h = 0 1h = 1 2h = 2 3h = 3 4h = 4 5h = 5 6h = 6 7h = 7 8h = 8 9h = 9 Ah = 10 Bh = 11 Ch = 12 Dh = 13 Eh = 14 Fh = 15 3:0 SLEWRATE_OPT_3 R/W 6h/Ah There are four register assignments each storing a slew rate value (chosen out of the 16 available slew rate values). This register bits relate to the 3rd option. Go to Programmable Output Slew Rate section for more information. 0h = 0 1h = 1 2h = 2 3h = 3 4h = 4 5h = 5 6h = 6 (Default for LMKDB1108FS) 7h = 7 8h = 8 9h = 9 Ah = 10 (Default for LMKDB1108) Bh = 11 Ch = 12 Dh = 13 Eh = 14 Fh = 15 9.4.22 R98 Register (Offset = 62h) [Reset = 00h] R98 is shown in Table 9-102. Return to the Summary Table. Table 9-102. R98 Register Field Descriptions Bit Field Type Reset Description 7 SLEWRATE_SEL_CLK7_ LSB R/W 0h LSB CLK7 Slew Rate Control 6 SLEWRATE_SEL_CLK6_ LSB R/W 0h LSB CLK6 Slew Rate Control 5 SLEWRATE_SEL_CLK5_ LSB R/W 0h LSB CLK5 Slew Rate Control 4 SLEWRATE_SEL_CLK4_ LSB R/W 0h LSB CLK4 Slew Rate Control 3 SLEWRATE_SEL_CLK3_ LSB R/W 0h LSB CLK3 Slew Rate Control LMKDB1102, LMKDB1104, LMKDB1104FS, LMKDB1108, LMKDB1108FS LMKDB1112, LMKDB1120, LMKDB1120FS SNAS855G – NOVEMBER 2023 – REVISED MAY 2026 www.ti.com 88 Submit Document Feedback Copyright © 2026 Texas Instruments Incorporated Product Folder Links: LMKDB1102 LMKDB1104 LMKDB1104FS LMKDB1108 LMKDB1108FS LMKDB1112 LMKDB1120 LMKDB1120FS |
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