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R5F572TFGDFP Scheda tecnica(PDF) 5 Page - Renesas Technology Corp

Il numero della parte R5F572TFGDFP
Spiegazioni elettronici  Renesas MCUs
PDF  120 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F572TFGDFP Scheda tecnica(HTML) 5 Page - Renesas Technology Corp

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R01DS0331EJ0110 Rev.1.10
Page 5 of 120
Oct 06, 2023
RX72T Group
1. Overview
Event link controller (ELC)
 Event signals such as interrupt request signals can be interlinked with the operation of
functions such as timer counting, eliminating the need for intervention by the CPU to
control the functions.
 188 internal event signals can be freely combined for interlinked operation with
connected functions.
 Event signals from peripheral modules can be used to change the states of output pins
(of ports B and E).
 Changes in the states of pins (of ports B and E) being used as inputs can be interlinked
with the operation of peripheral modules.
Timers
8-bit timers (TMR)
 (8 bits × 2 channels) × 4 units
 Select from among seven internal clock signals (PCLKB/1, PCLKB/2, PCLKB/8, PCLKB/
32, PCLKB/64, PCLKB/1024, PCLKB/8192) and one external clock signal
 Capable of output of pulse trains with desired duty cycles or of PWM signals
 The 2 channels of each unit can be cascaded to create a 16-bit timer
 Generation of triggers for A/D converter conversion
 Capable of generating baud-rate clocks for SCI5, SCI6, and SCI12
 Event linking by the ELC
Compare match timer
(CMT)
 (16 bits × 2 channels) × 2 units
 Select from among four internal clock signals (PCLKB/8, PCLKB/32, PCLKB/128,
PCLKB/512)
 Event linking by the ELC
Watchdog timer (WDTA)
 14 bits × 1 channel
 Select from among 6 counter-input clock signals (PCLKB/4, PCLKB/64, PCLKB/128,
PCLKB/512, PCLKB/2048, PCLKB/8192)
Independent watchdog
timer (IWDTa)
 14 bits × 1 channel
 Counter-input clock: IWDT-dedicated on-chip oscillator
 Dedicated clock/1, dedicated clock/16, dedicated clock/32, dedicated clock/64, dedicated
clock/128, dedicated clock/256
 Window function: The positions where the window starts and ends are specifiable (the
window defines the timing with which refreshing is enabled and disabled).
 Event linking by the ELC
Table 1.1
Outline of Specifications (4/9)
Classification
Module/Function
Description



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