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R5F572TFGDFP Scheda tecnica(PDF) 73 Page - Renesas Technology Corp |
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R5F572TFGDFP Scheda tecnica(HTML) 73 Page - Renesas Technology Corp |
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73 / 120 page ![]() R01DS0331EJ0110 Rev.1.10 Page 73 of 120 Oct 06, 2023 RX72T Group 2. Electrical Characteristics Figure 2.19 External Bus Timing/Normal Write Cycle (Bus Clock Synchronized) A20 to A1 CS3# to CS0# tAD BCLK A20 to A0 Byte strobe mode 1-write strobe mode BC1#, BC0# Common to both byte strobe mode and 1-write strobe mode tBCD tCSD tCSD tAD tAD tAD tBCD D15 to D0 (Write) WR1#, WR0#, WR# (Write) tWRD tWRD tWDH tWDD TW1 TW2 Tend Tn1 Tn2 WRON:1 WDON:1 *1 CSWWAIT:2 WDOFF:1 *1 CSON:0 Note 1. Specify WDON and WDOFF as at least one cycle of BCLK. CSWOFF:2 |
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