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HD404369F Scheda tecnica(PDF) 68 Page - Renesas Technology Corp |
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HD404369F Scheda tecnica(HTML) 68 Page - Renesas Technology Corp |
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68 / 117 page ![]() HD404369 Series 66 T (N + 1) T 256 T T (256 – N) × × × TMC3 = 0 (free-running timer) TMC3 = 1 (reload timer) Notes: T: Input clock period supplied to counter. (The clock source and system clock division ratio are determined by timer mode register C.) N: Value of timer write register C. (When N = 255 ($FF), PWM output is fixed low.) Figure 49 PWM Output Waveform Registers for Timer C Operation: By using the following registers, timer C operation modes are selected and the timer C count is read and written. Timer mode register C (TMC: $00D) Port mode register A (PMRA: $004) Timer write register C (TWCL: $00E, TWCU: $00F) Timer read register C (TRCL: $00E, TRCU: $00F) • Timer mode register C (TMC: $00D): Four-bit write-only register that selects the free-running/reload timer function, input clock source, and the prescaler division ratio as shown in figure 50. It is reset to $0 by MCU reset. Writing to this register is valid from the second instruction execution cycle after the execution of the previous timer mode register C write instruction. Setting timer C’s initialization by writing to timer write register C (TWCL: $00E, TWCU: $00F) must be done after a mode change becomes valid. |
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