HD404369F datasheet(10/117 Pages) RENESAS

10 / 117 page

HD404369 Series

Memory Map

ROM Memory Map

The ROM memory map is shown in figure 1 and described below.

Vector Address Area ($0000–$000F): Reserved for JMPL instructions that branch to the start addresses

of the reset and interrupt routines. After MCU reset or an interrupt, program execution continues from the

vector address.

Zero-Page Subroutine Area ($0000–$003F): Reserved for subroutines. The program branches to a

subroutine in this area in response to the CAL instruction.

Pattern Area ($0000–$0FFF): Contains ROM data that can be referenced with the P instruction.

Program Area ($0000-$0FFF (HD404364, HD40A4364), $0000–$1FFF (HD404368, HD40A4368),

$0000–$2FFF (HD4043612, HD40A43612), $0000–$3FFF (HD404369, HD40A4369, HD407A4369)):

The entire ROM area can be used for program coding.

$000F

$0FFF

$1000

$2FFF

$0010

$003F

$0040

Vector address

(16 words)

Zero-page subroutine

(64 words)

Program

(4,096 words)

Program

(8,192 words)

$0000

$0001

$0002

$0003

$0004

$0005

$0006

$0007

$0008

$0009

$000A

$000B

$000C

$000D

$000E

$000F

JMPL instruction

(jump to

RESET, STOPC routine)

JMPL instruction

(jump to

INT routine)

JMPL instruction

(jump to timer A routine)

JMPL instruction

(jump to timer B routine)

JMPL instruction

(jump to timer C routine)

JMPL instruction

(jump to A/D converter routine)

JMPL instruction

(jump to

INT routine)

JMPL instruction

(jump to serial routine)

Program

(12,288 words)

Program

(16,384 words)

For HD404369, HD40A4369,

HD407A4369

$1FFF

$2000

$3000

$3FFF

For HD404364, HD40A4364

For HD404368, HD40A4368

For HD4043612, HD40A43612

Note:

Since the ROM address areas between $0000–$0FFF overlap, the user can determine how these

areas are to be used.

Figure 1 ROM Memory Map

RAM Memory Map

The MCU contains 512-digit

× 4 bit RAM areas. These RAM areas consist of a memory register area, a

data area, and a stack area. In addition, an interrupt control bits area, special function register area, and

The RAM memory map is shown in figure 2 and described below.

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