HD6432138SW datasheet(34/1061 Pages) RENESAS

34 / 1061 page

Rev. 4.00 Jun 06, 2006 page xxxiv of liv

A.2

Instruction Codes .............................................................................................................. 831

A.3

Operation Code Map......................................................................................................... 845

A.4

Number of States Required for Execution ........................................................................ 849

A.5

Bus States during Instruction Execution ........................................................................... 862

Appendix B Internal I/O Registers ................................................................................. 878

B.1

Addresses .......................................................................................................................... 878

B.2

Register Selection Conditions ........................................................................................... 884

B.3

Functions........................................................................................................................... 891

Appendix C I/O Port Block Diagrams........................................................................... 965

C.1

Port 1 Block Diagram ....................................................................................................... 965

C.2

Port 2 Block Diagrams...................................................................................................... 966

C.3

Port 3 Block Diagram ....................................................................................................... 969

C.4

Port 4 Block Diagrams...................................................................................................... 970

C.5

Port 5 Block Diagrams...................................................................................................... 977

C.6

Port 6 Block Diagrams...................................................................................................... 980

C.7

Port 7 Block Diagrams...................................................................................................... 985

C.8

Port 8 Block Diagrams...................................................................................................... 986

C.9

Port 9 Block Diagrams...................................................................................................... 992

Appendix D Pin States ....................................................................................................... 997

D.1

Port States in Each Processing State ................................................................................. 997

Appendix E Timing of Transition to and Recovery

from Hardware Standby Mode................................................................ 999

E.1

Timing of Transition to Hardware Standby Mode ............................................................ 999

E.2

Timing of Recovery from Hardware Standby Mode......................................................... 999

Appendix F Product Code Lineup ................................................................................ 1000

Appendix G Package Dimensions ................................................................................ 1002

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