| Motore di ricerca datesheet componenti elettronici |
|
HD6432138SW Scheda tecnica(PDF) 26 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
HD6432138SW Scheda tecnica(HTML) 26 Page - Renesas Technology Corp |
|
26 / 1061 page ![]() Rev. 4.00 Jun 06, 2006 page xxvi of liv 14.3.3 Timing of Setting of Overflow Flag (OVF) ......................................................... 383 14.4 Interrupts ........................................................................................................................... 384 14.5 Usage Notes ...................................................................................................................... 384 14.5.1 Contention between Timer Counter (TCNT) Write and Increment ..................... 384 14.5.2 Changing Value of CKS2 to CKS0...................................................................... 385 14.5.3 Switching between Watchdog Timer Mode and Interval Timer Mode................ 385 14.5.4 Counter Value in Transitions between High-Speed Mode, Subactive Mode, and Watch Mode .................................................................................................. 385 14.5.5 OVF Flag Clear Condition ................................................................................... 386 Section 15 Serial Communication Interface (SCI, IrDA) ........................................ 387 15.1 Overview........................................................................................................................... 387 15.1.1 Features................................................................................................................ 387 15.1.2 Block Diagram ..................................................................................................... 389 15.1.3 Pin Configuration................................................................................................. 390 15.1.4 Register Configuration......................................................................................... 390 15.2 Register Descriptions ........................................................................................................ 392 15.2.1 Receive Shift Register (RSR) .............................................................................. 392 15.2.2 Receive Data Register (RDR) .............................................................................. 392 15.2.3 Transmit Shift Register (TSR) ............................................................................. 393 15.2.4 Transmit Data Register (TDR)............................................................................. 393 15.2.5 Serial Mode Register (SMR)................................................................................ 394 15.2.6 Serial Control Register (SCR).............................................................................. 397 15.2.7 Serial Status Register (SSR) ................................................................................ 401 15.2.8 Bit Rate Register (BRR) ...................................................................................... 405 15.2.9 Serial Interface Mode Register (SCMR).............................................................. 413 15.2.10 Module Stop Control Register (MSTPCR) .......................................................... 414 15.2.11 Keyboard Comparator Control Register (KBCOMP) .......................................... 416 15.3 Operation .......................................................................................................................... 417 15.3.1 Overview.............................................................................................................. 417 15.3.2 Operation in Asynchronous Mode ....................................................................... 419 15.3.3 Multiprocessor Communication Function............................................................ 430 15.3.4 Operation in Synchronous Mode ......................................................................... 438 15.3.5 IrDA Operation .................................................................................................... 447 15.4 SCI Interrupts.................................................................................................................... 450 15.5 Usage Notes ...................................................................................................................... 451 Section 16 I 2C Bus Interface [H8S/2138 Group Option] ......................................... 455 16.1 Overview........................................................................................................................... 455 16.1.1 Features................................................................................................................ 455 16.1.2 Block Diagram ..................................................................................................... 456 |
|
Link URL |
| Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | Collegamento alla scheda tecnica | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |