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HD6432138SW Scheda tecnica(PDF) 92 Page - Renesas Technology Corp

Il numero della parte HD6432138SW
Spiegazioni elettronici  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
PDF  1061 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD6432138SW Scheda tecnica(HTML) 92 Page - Renesas Technology Corp

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Section 2 CPU
Rev. 4.00 Jun 06, 2006 page 38 of 1004
REJ09B0301-0400
Operations can be performed on the CCR bits by the LDC, STC, ANDC, ORC, and XORC
instructions. The N, Z, V, and C flags are used as branching conditions for conditional branch
(Bcc) instructions.
2.4.4
Initial Register Values
Reset exception handling loads the CPU’s program counter (PC) from the vector table, clears the
trace bit in EXR to 0, and sets the interrupt mask bits in CCR and EXR to 1. The other CCR bits
and the general registers are not initialized. In particular, the stack pointer (ER7) is not initialized.
The stack pointer should therefore be initialized by an MOV.L instruction executed immediately
after a reset.



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