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HD6432138SW Scheda tecnica(PDF) 42 Page - Renesas Technology Corp

Il numero della parte HD6432138SW
Spiegazioni elettronici  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD6432138SW Scheda tecnica(HTML) 42 Page - Renesas Technology Corp

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Rev. 4.00 Jun 06, 2006 page xlii of liv
Section 21 ROM (Mask ROM Version, H8S/2138 F-ZTAT, H8S/2134 F-ZTAT,
and H8S/2132 F-ZTAT)
Figure 21.1
ROM Block Diagram (H8S/2138, H8S/2134)................................................... 577
Figure 21.2
Block Diagram of Flash Memory ...................................................................... 581
Figure 21.3
Flash Memory Mode Transitions....................................................................... 582
Figure 21.4
Boot Mode ......................................................................................................... 583
Figure 21.5
User Program Mode (Example)......................................................................... 584
Figure 21.6
Flash Memory Block Configuration .................................................................. 585
Figure 21.7
System Configuration in Boot Mode................................................................. 594
Figure 21.8
Boot Mode Execution Procedure....................................................................... 595
Figure 21.9
RxD1 Input Signal When Using Automatic SCI Bit Rate Adjustment ............. 596
Figure 21.10
RAM Areas in Boot Mode................................................................................. 597
Figure 21.11
User Program Mode Execution Procedure ........................................................ 599
Figure 21.12
Program/Program-Verify Flowchart.................................................................. 602
Figure 21.13
Erase/Erase-Verify Flowchart (Single-Block Erase) ......................................... 604
Figure 21.14
Flash Memory State Transitions........................................................................ 607
Figure 21.15
Memory Map in Programmer Mode.................................................................. 610
Figure 21.16
Memory Read Mode Timing Waveforms after Command Write...................... 612
Figure 21.17
Timing Waveforms When Entering Another Mode from Memory
Read Mode ........................................................................................................ 613
Figure 21.18
Timing Waveforms for
CE/OE Enable State Read............................................ 614
Figure 21.19
Timing Waveforms for
CE/OE Clocked Read .................................................. 614
Figure 21.20
Auto-Program Mode Timing Waveforms.......................................................... 616
Figure 21.21
Auto-Erase Mode Timing Waveforms .............................................................. 617
Figure 21.22
Status Read Mode Timing Waveforms.............................................................. 619
Figure 21.23
Oscillation Stabilization Time, Programmer Mode Setup Time,
and Power Supply Fall Sequence ...................................................................... 620
Section 22 ROM (H8S/2138 F-ZTAT A-Mask Version, H8S/2134 F-ZTAT A-Mask
Version)
Figure 22.1
ROM Block Diagram......................................................................................... 623
Figure 22.2
Block Diagram of Flash Memory ...................................................................... 627
Figure 22.3
Flash Memory Mode Transitions....................................................................... 628
Figure 22.4
Boot Mode ......................................................................................................... 629
Figure 22.5
User Program Mode (Example)......................................................................... 630
Figure 22.6
Flash Memory Block Configuration .................................................................. 631
Figure 22.7
System Configuration in Boot Mode................................................................. 640
Figure 22.8
Boot Mode Execution Procedure....................................................................... 641
Figure 22.9
Automatic SCI Bit Rate Adjustment ................................................................. 642
Figure 22.10
RAM Areas in Boot Mode................................................................................. 643
Figure 22.11
User Program Mode Execution Procedure ........................................................ 645



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