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HD6432138SW Scheda tecnica(PDF) 353 Page - Renesas Technology Corp |
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HD6432138SW Scheda tecnica(HTML) 353 Page - Renesas Technology Corp |
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353 / 1061 page ![]() Section 11 16-Bit Free-Running Timer Rev. 4.00 Jun 06, 2006 page 299 of 1004 REJ09B0301-0400 Contention between FRC Write and Increment: If an FRC increment pulse is generated during the state after an FRC write cycle, the write takes priority and FRC is not incremented. Figure 11.19 shows this type of contention. T1 T2 FRC write cycle Address Internal write signal φ FRC input clock FRC N M Write data FRC address Figure 11.19 FRC Write-Increment Contention |
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