HD6432138SW datasheet(429/1061 Pages) RENESAS

Il numero della parte	HD6432138SW

Spiegazioni elettronici	Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

PDF	1061 Pages

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Produttore elettronici	RENESAS [Renesas Technology Corp]

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Section 14 Watchdog Timer (WDT)

Rev. 4.00 Jun 06, 2006 page 375 of 1004

REJ09B0301-0400

14.2

14.2.1

Timer Counter (TCNT)

R/W

Bit

Initial value

Read/Write

TCNT is an 8-bit readable/writable* up-counter.

When the TME bit is set to 1 in TCSR, TCNT starts counting pulses generated from the internal

clock source selected by bits CKS2 to CKS0 in TCSR. When the TCNT value overflows (changes

from H'FF to H'00), the OVF flag in TCSR is set to 1, and an internal reset, NMI interrupt,

interval timer interrupt (WOVI), etc., can be generated, according to the mode selected by the

WT/

IT bit and RST/NMI bit.

TCNT is initialized to H'00 by a reset, in hardware standby mode, or when the TME bit is cleared

to 0. It is not initialized in software standby mode.

Note: *

TCNT is write-protected by a password to prevent accidental overwriting. For details

see section 14.2.4, Notes on Register Access.

HD6432138SW Scheda tecnica(PDF) 429 Page - Renesas Technology Corp