HD6432138SW datasheet(739/1061 Pages) RENESAS

Il numero della parte	HD6432138SW

Spiegazioni elettronici	Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

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Section 24 Power-Down State

Rev. 4.00 Jun 06, 2006 page 685 of 1004

REJ09B0301-0400

24.1.1

The power-down state is controlled by the SBYCR, LPWRCR, TCSR (WDT1), and MSTPCR

registers. Table 24.3 summarizes these registers.

Table 24.3

Power-Down State Registers

Name

Abbreviation

R/W

Initial Value

Address*

Standby control register

SBYCR

R/W

H'00

H'FF84*

Low-power control register

LPWRCR

R/W

H'00

H'FF85*

Timer control/status register

(WDT1)

TCSR

R/W

H'00

H'FFEA

Module stop control register

MSTPCRH

R/W

H'3F

H'FF86*

MSTPCRL

R/W

H'FF

H'FF87*

Notes: 1. Lower 16 bits of the address.

2. Some power down state registers are assigned to the same address as other registers.

In this case, register selection is performed by the FLSHE bit in the serial timer control

24.2

24.2.1

Standby Control Register (SBYCR)

SSBY

R/W

STS2

R/W

STS1

R/W

STS0

R/W

—

SCK0

R/W

SCK2

R/W

SCK1

R/W

Bit

Initial value

Read/Write

SBYCR is an 8-bit readable/writable register that performs power-down mode control.

SBYCR is initialized to H'00 by a reset and in hardware standby mode. It is not initialized in

software standby mode.

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