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HD6432138SW Scheda tecnica(PDF) 983 Page - Renesas Technology Corp |
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HD6432138SW Scheda tecnica(HTML) 983 Page - Renesas Technology Corp |
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983 / 1061 page ![]() Appendix B Internal I/O Registers Rev. 4.00 Jun 06, 2006 page 929 of 1004 REJ09B0301-0400 DACR—PWM (D/A) Control Register H'FFA0 PWMX 7 TEST 0 R/W 6 PWME 0 R/W 5 — 1 — 4 — 1 — 3 OEB 0 R/W 0 CKS 0 R/W 2 OEA 0 R/W 1 OS 0 R/W Bit Initial value Read/Write Clock select 0 Resolution (T) = system clock cycle time (tcyc) 1 Resolution (T) = system clock cycle time (tcyc) × 2 Output select 0 Direct PWM output 1 Inverted PWM output Output enable A 0 PWM channel A output (PWX0 output pin) disabled 1 PWM channel A output (PWX0 output pin) enabled Output enable B 0 PWM channel B output (PWX1 output pin) disabled 1 PWM channel B output (PWX1 output pin) enabled PWM enable 0 DACNT operates as a 14-bit up-counter 1 DACNT halts at H'0003 Test mode 0 User mode: the PWM D/A module operates normally 1 Test mode: correct conversion results will not be obtained |
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