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HD6432138SW Scheda tecnica(PDF) 226 Page - Renesas Technology Corp |
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HD6432138SW Scheda tecnica(HTML) 226 Page - Renesas Technology Corp |
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226 / 1061 page ![]() Section 7 Data Transfer Controller [H8S/2138 Group] Rev. 4.00 Jun 06, 2006 page 172 of 1004 REJ09B0301-0400 On-chip supporting module IRQ interrupt DTVECR Interrupt controller CPU DTC DTCER Clear control Select Interrupt request Source flag cleared Clear Clear request Interrupt mask Figure 7.3 Block Diagram of DTC Activation Source Control When an interrupt has been designated a DTC activation source, existing CPU mask level and interrupt controller priorities have no effect. If there is more than one activation source at the same time, the DTC is activated in accordance with the default priorities. |
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