H8SSLASH2218 datasheet(417/750 Pages) RENESAS

417 / 750 page

Section 12 Serial Communication Interface

Rev.6.00 Jun. 03, 2008 Page 369 of 698

REJ09B0074-0600

12.3.5

Serial Mode Register (SMR)

SMR is used to set the SCI's serial transfer format and select the baud rate generator clock source.

Some bits in SMR have different functions in normal mode and smart card interface mode.

• Normal Serial Communication Interface Mode (When SMIF in SCMR is 0)

Bit

Bit Name Initial Value

R/W

Description

R/W

Communication Mode

0: Asynchronous mode

1: Clocked synchronous mode

CHR

R/W

Character Length (enabled only in asynchronous mode)

0: Selects 8 bits as the data length

1: Selects 7 bits as the data length. LSB-first is fixed

and the MSB of TDR is not transmitted in

transmission

In clocked synchronous mode, a fixed data length of 8

bits is used.

R/W

Parity Enable (enabled only in asynchronous mode)

When this bit is set to 1, the parity bit is added to

transmit data before transmission, and the parity bit is

checked in reception. For a multiprocessor format, parity

bit addition and checking are not performed regardless

of the PE bit setting.

R/W

Parity Mode (enabled only when the PE bit is 1 in

asynchronous mode)

0: Selects even parity

1: Selects odd parity

STOP

R/W

Stop Bit Length (enabled only in asynchronous mode)

Selects the stop bit length in transmission.

0: 1 stop bit

1: 2 stop bits

In reception, only the first stop bit is checked. If the

second stop bit is 0, it is treated as the start bit of the

next transmit character.

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