H8SSLASH2218 datasheet(419/750 Pages) RENESAS

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Section 12 Serial Communication Interface

Rev.6.00 Jun. 03, 2008 Page 371 of 698

REJ09B0074-0600

• Smart Card Interface Mode (When SMIF in SCMR is 1)

Bit

Bit Name Initial Value

R/W

Description

GSM Mode

Setting this bit to 1 allows GSM mode operation. In GSM

mode, the TEND set timing is put forward to 11.0 etu

from the start and the clock output control function is

appended. For details, see section 12.7.9, Clock Output

Control.

0: Normal smart card interface mode operation

(initial value)

(1) The TEND flag is generated 12.5 etu (11.5 etu in the

block transfer mode) after the beginning of the start

bit.

(2) Clock output on/off control only.

R/W

1: GSM mode operation in smart card interface mode

(1) The TEND flag is generated 11.0 etu after the

beginning of the start bit.

(2) In addition to clock output on/off control, high/how

fixed control is supported (set using SCR).

BLK

R/W

Setting this bit to 1 allows block transfer mode operation.

For details, see section 12.7.4, Block Transfer Mode.

0: Normal smart card interface mode operation

(initial value)

(1) Error signal transmission, detection, and automatic

data retransmission are performed.

(2) The TXI interrupt is generated by the TEND flag.

(3) The TEND flag is set 12.5 etu (11.0 etu in the GSM

mode) after transmission starts.

1: Operation in block transfer mode

(1) Error signal transmission, detection, and automatic

data retransmission are not performed.

(2) The TXI interrupt is generated by the TDRE flag.

(3) The TEND flag is set 11.5 etu (11.0 etu in the GSM

mode) after transmission starts.

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