H8SSLASH2218 datasheet(529/750 Pages) RENESAS

529 / 750 page

Section 14 Universal Serial Bus (USB)

Rev.6.00 Jun. 03, 2008 Page 481 of 698

REJ09B0074-0600

Bit

Bit Name

Initial Value

R/W

Description

BRST

R/(W)* Bus Reset

Set to 1 when the bus reset signal is detected on the

USB bus. The corresponding interrupt output is

EXIRQ0 or EXIRQ1.

Note that BRST is also set to 1 if D+ is not pulled-up

during USB cable connection.

—

Reserved

This bit is always read as 0 and cannot be modified.

EP3TR

R/(W)* EP3 Transfer Request

Set to 1 if there is no valid data in the FIFO when an IN

token is sent from the host to EP3. The corresponding

interrupt output is

EXIRQ0 or EXIRQ1.

EP3TS

R/(W)* EP3 Transmit Complete

Set to 1 if the data written in EP3 is transmitted to the

host normally and the ACK handshake is returned. The

corresponding interrupt output is

EXIRQ0 or EXIRQ1.

EP0oTS

R/(W)* EP0o Receive Complete

Set to 1 if EP0o receives data from the host normally

and returns the ACK handshake to the host. The

corresponding interrupt output is

EXIRQ0 or EXIRQ1.

EP0iTR

R/(W)* EP0i Transfer Request

Set to 1 if there is no valid data in the FIFO when an

IN token is sent from the host to EP0i. The

corresponding interrupt output is

EXIRQ0 or EXIRQ1.

EP0iTS

R/(W)* EP0i Transmit Complete

Set to 1 if the data written in EP0i is transmitted to the

host normally and the ACK handshake is returned.

The corresponding interrupt output is

EXIRQ0 or

EXIRQ1.

SetupTS

R/(W)* Setup Command Receive Complete

Set to 1 if EP0s normally receives 8-byte command

data to be decoded by the function from the host and

returns the ACK handshake to the host. The

corresponding interrupt output is

EXIRQ0 or EXIRQ1.

Note:* The write value should always be 0 to clear this flag.

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