H8SSLASH2218 datasheet(590/750 Pages) RENESAS

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Section 15 A/D Converter

Rev.6.00 Jun. 03, 2008 Page 542 of 698

REJ09B0074-0600

15.5

Operation

The A/D converter operates by successive approximation with 10-bit resolution. It has two

operating modes; single mode and scan mode. When changing the operating mode or analog input

channel, in order to prevent incorrect operation, first clear the bit ADST to 0 in ADCSR. The

ADST bit can be set at the same time as the operating mode or analog input channel is changed.

15.5.1

Single Mode

In single mode, A/D conversion is to be performed only once on the specified single channel. The

operations are as follows.

1. A/D conversion is started when the ADST bit is set to 1, according to software or external

trigger input.

2. When A/D conversion is completed, the result is transferred to the corresponding A/D data

3. On completion of conversion, the ADF bit in ADCSR is set to 1. If the ADIE bit is set to 1 at

this time, an ADI interrupt request is generated.

4. The ADST bit remains set to 1 during A/D conversion. When A/D conversion ends, the ADST

bit is automatically cleared to 0 and the A/D converter enters the wait state.

ADIE

ADST

ADF

State of channel 0 (AN0)

A/D

conversion

starts

ADDRA

ADDRB

ADDRC

ADDRD

State of channel 1 (AN1)

State of channel 2 (AN2)

State of channel 3 (AN3)

Note: * Vertical arrows ( ) indicate instructions executed by software.

Set*

Clear*

A/D conversion result 1

A/D conversion

A/D conversion result 2

Read conversion result*

Idle

A/D conversion

Set*

Figure 15.3 A/D Conversion Timing (Single-Chip Mode, Channel 1 Selected)

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