H8SSLASH2218 datasheet(125/750 Pages) RENESAS

125 / 750 page

Section 3 MCU Operating Modes

Rev.6.00 Jun. 03, 2008 Page 77 of 698

REJ09B0074-0600

3.4

Memory Map in Each Operating Mode

Figures 3.1 to 3.3 show the memory map in each operation mode, respectively.

External address

space

Notes: 1.

Though RTC and USB registers are provided inside the chip, ASN, RDN, and WRN are asserted and

the addresses are output when these areas are accessed.

Therefore, care should be taken when connecting memory externally.

The reserved area of H'FEE800 to H'FFBFFF should not be accessed.

The external address can be used instead, by clearing the RAME bit in SYSCR to 0.

External address

space

On-chip RAM*3

USB registers*1

Internal I/O registers*1

Reserved*2

On-chip RAM*3

External address

space

External address

space

On-chip RAM*3

On-chip ROM

USB registers*1

Internal I/O registers*1

Reserved*2

On-chip RAM*3

External address

space

External address

space

On-chip RAM

USB registers

Internal I/O registers

On-chip RAM

H'000000

H'01FFFF

H'020000

H'E00000

H'FEE800

H'C00000

H'000000

H'FFC000

H'FEE800

H'FFC000

H'E00000

H'FEE800

H'C00000

H'FFC000

H'FFEFBF

H'FFFFC0

H'FFFFFF

H'FFEFC0

H'FFF800

H'DFFFFF

H'C00000

Modes 4 and 5

(advanced extended modes

with on-chip ROM desabled)

Mode 6

(advanced extended mode

with on-chip ROM enabled)

Mode 7

(advanced single-chip mode)

ROM:

⎯

RAM: 12 kbytes

ROM: 128 kbytes

RAM: 12 kbytes

ROM: 128 kbytes

RAM: 12 kbytes

Figure 3.1 Memory Map in Each Operating Mode for HD64F2218 and HD64F2218U

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