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H8S/2218 Scheda tecnica(PDF) 217 Page - Renesas Technology Corp |
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H8S/2218 Scheda tecnica(HTML) 217 Page - Renesas Technology Corp |
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217 / 750 page ![]() Section 7 DMA Controller (DMAC) Rev.6.00 Jun. 03, 2008 Page 169 of 698 REJ09B0074-0600 7.3.5 DMA Band Control Register (DMABCR) DMABCR controls the operation of each DMAC channel. • Short Address Mode Bit Bit Name Initial Value R/W Description 15 FAE1 0 R/W Full Address Enable 1 Specifies whether channel 1 is to be used in short address mode or full address mode. In short address mode, channels 1A and 1B are used as independent channels. 0: Short address mode 1: Full address mode 14 FAE0 0 R/W Full Address Enable 0 Specifies whether channel 0 is to be used in short address mode or full address mode. In short address mode, channels 0A and 0B are used as independent channels. 0: Short address mode 1: Full address mode 13, 12 ⎯ ⎯ R/W Reserved The write value should always be 0. |
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