AD9547SLASHPCBZ datasheet(6/104 Pages) AD

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AD9547

Rev. 0 | Page 6 of 104

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

Low Frequency Path

Input Frequency Range

3.5

100

MHz

Minimum Input Slew Rate

V/μs

Minimum limit imposed for jitter performance

Common-Mode Voltage

1.2

Internally generated

Differential Input Voltage Sensitivity

100

mV p-

This is the minimum voltage required across the pins to

ensure switching between logic states; the

instantaneous voltage on either pin must not exceed the

supply rails; ac ground the unused input to accommodate

single-ended operation

Input Capacitance

Single-ended, each pin

Input Resistance

kΩ

Crystal Resonator Path

Crystal Resonator Frequency Range

MHz

Fundamental mode, AT cut

Maximum Crystal Motional

Resistance

100

See the System Clock Inputs section for recommendations

DISTRIBUTION CLOCK INPUTS (CLKINP, CLKINN)

Table 7.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

INPUT FREQUENCY RANGE

62.5

500

MHz

MINIMUM SLEW RATE

V/μs

Minimum limit imposed for jitter performance

COMMON-MODE VOLTAGE

700

Internally generated

DIFFERENTIAL INPUT VOLTAGE SENSITIVITY

100

mV p-p

Capacitive coupling required; ac ground the unused

input to accommodate single-ended operation; the

instantaneous voltage on either pin must not exceed

the supply rails

DIFFERENTIAL INPUT POWER SENSITIVITY

−15

dBm

Same as voltage sensitivity but specified as power into a

50 Ω load

INPUT CAPACITANCE

INPUT RESISTANCE

kΩ

Each pin has a 2.5 kΩ internal dc bias resistance

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