AD9547SLASHPCBZ datasheet(98/104 Pages) AD

98 / 104 page

AD9547

Rev. 0 | Page 98 of 104

APPLICATIONS INFORMATION

POWER SUPPLY PARTITIONS

The AD9547 features multiple power supplies, and their power

consumption varies with the AD9547 configuration. This section

provides information about which power supplies can be grouped

together and how the power consumption of each block varies

with frequency.

The numbers quoted in this section are for comparison only. Refer

to the Specifications section for exact numbers. With each group,

bypass capacitors of 1 μF in parallel with 10 μF should be used.

Upon applying power to the device, internal circuitry monitors

the 1.8 V digital core supply and the 3.3 V digital I/O supply.

When these supplies cross the desired threshold level, the device

generates an internal 10 μs reset pulse. This pulse does not appear

on the RESET pin.

3.3 V Supplies

The 3.3 V supply domain consists of two main partitions: digital

(DVDD3) and analog (AVDD3). These two supply domains

must be kept separate.

Furthermore, the AVDD3 consists of two subdomains: the clock

distribution output domain (Pin 25, Pin 31) and the rest of the

AVDD3 supply connections. Generally, the ADD3 supply domains

can be joined together. However, if an application requires 1.8 V

CMOS driver operation in the clock distribution output block,

provide one 1.8 V supply domain to power the clock distribution

output block. Each output driver has a dedicated supply pin, as

shown in Table 158.

Table 158. Output Driver Supply Pins

Output Driver

Supply Pin

OUT0

OUT1

1.8 V Supplies

The 1.8 V supply domain consists of two main partitions: digital

(DVDD) and analog (AVDD). These two supply domains must

be kept separate.

THERMAL PERFORMANCE

The AD9547 is specified for a case temperature (TCASE). To ensure

that TCASE is not exceeded, an airflow source can be used. Use the

following equation to determine the junction temperature on

the application PCB:

TJ = TCASE + (ΨJT × PD)

where:

TJ is the junction temperature in degrees Celsius (°C).

TCASE is the case temperature in degrees Celsius (°C) measured

by the customer at the top center of the package.

ΨJT is the value that is indicated in Table 159.

PD is the power dissipation (see the Power Dissipation section).

Values of θJA are provided for package comparison and PCB design

considerations. θJA can be used for a first-order approximation of TJ

using the following equation:

TJ = TA + (θJA × PD)

where TA is the ambient temperature in degrees Celsius (°C).

Values of θJC are provided for package comparison and PCB

design considerations when an external heat sink is required.

Values of θJB are provided for package comparison and PCB

design considerations.

Table 159. Thermal Parameters for the AD9547 64-Lead LFCSP Package

Symbol

Thermal Characteristic Using a JEDEC51-7 Plus JEDEC51-5 2S2P Test Board1

Value2

Unit

θJA

Junction-to-ambient thermal resistance, 0.0 m/sec air flow per JEDEC JESD51-2 (still air)

21.7

°C/W

θJMA

Junction-to-ambient thermal resistance, 1.0 m/sec air flow per JEDEC JESD51-6 (moving air)

18.9

°C/W

θJMA

Junction-to-ambient thermal resistance, 2.5 m/sec air flow per JEDEC JESD51-6 (moving air)

16.9

°C/W

θJB

Junction-to-board thermal resistance, per JEDEC JESD51-8 (still air)

11.3

°C/W

θJC

Junction-to-case thermal resistance

1.2

°C/W

ΨJT

Junction-to-top-of-package characterization parameter, 0 m/sec airflow per JEDEC JESD51-2 (still air)

0.1

°C/W

1 The exposed pad on the bottom of the package must be soldered to ground to achieve the specified thermal performance.

2 Results are from simulations. The PCB is a JEDEC multilayer type. Thermal performance for actual applications requires careful inspection of the conditions in the

application to determine whether they are similar to those assumed in these calculations.

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