AD9547SLASHPCBZ datasheet(75/104 Pages) AD

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AD9547

Rev. 0 | Page 75 of 104

Table 70. Distribution Channel Modes

Address

Bit

Bit Name

Description

0x0404

[7:6]

Unused

Unused.

OUT0 CMOS phase invert

When the output mode is CMOS, the bit inverts the relative phase between the two

CMOS output pins. Otherwise, this bit is nonfunctional.

0 (default) = not inverted.

1 = inverted.

OUT0 polarity invert

Invert the polarity of OUT0.

0 (default) = not inverted.

1 = inverted.

OUT0 drive strength

OUT0 output drive capability control.

0 (default) = CMOS: low drive strength; LVDS: 3.5 mA nominal.

1 = CMOS: normal drive strength; LVDS: 7 mA nominal.

[2:0]

OUT0 mode

OUT0 operating mode select.

000 = CMOS (both pins).

001 = CMOS (positive pin), tristate (negative pin).

010 = tristate (positive pin), CMOS (negative pin).

011 (default) = tristate (both pins).

100 = LVDS.

101 = LVPECL.

110 = reserved.

111 = reserved.

0x0405

[7:6]

Unused

Unused.

OUT1 CMOS phase invert

When the output mode is CMOS, the bit inverts the relative phase between the two

CMOS output pins. Otherwise, this bit is nonfunctional.

0 (default) = not inverted.

1 = inverted.

OUT1 polarity invert

Invert the polarity of OUT1.

0 (default) = not inverted.

1 = inverted.

OUT1 drive strength

OUT1 output drive capability control.

0 (default) = CMOS: low drive strength; LVDS: 3.5 mA nominal.

1 = CMOS: normal drive strength; LVDS: 7 mA nominal.

[2:0]

OUT1 mode

OUT1 operating mode select.

000 = CMOS (both pins).

001 = CMOS (positive pin), tristate (negative pin).

010 = tristate (positive pin), CMOS (negative pin).

011 (default) = tristate (both pins).

100 = LVDS.

101 = LVPECL.

110 = reserved.

111 = reserved.

0x0406

[7:0]

Unused

Unused.

0x0407

[7:0]

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