CDPCLK4 datasheet(101/274 Pages) ALTERA

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Chapter 6: I/O Features in the Cyclone III Device Family

6–3

I/O Element Features

July 2012

Altera Corporation

Cyclone III Device Handbook

Volume 1

Table 6–1 lists the possible settings for I/O standards with current strength control.

These programmable current strength settings are a valuable tool in helping decrease

the effects of simultaneously switching outputs (SSO) in conjunction with reducing

system noise. The supported settings ensure that the device driver meets the

specifications for IOH and IOL of the corresponding I/O standard.

1 When you use programmable current strength, on-chip series termination is not

available.

f For information about how to interface the Cyclone III device family with 3.3-, 3.0-, or

2.5-V systems, refer to the guidelines provided in AN 447: Interfacing Cyclone III and

Cyclone IV Devices with 3.3/3.0/2.5-V LVTTL/LVCMOS I/O Systems.

Table 6–1. Programmable Current Strength (1)

I/O Standard

IOH/IOL Current Strength Setting (mA)

Top and Bottom I/O Pins

Left and Right I/O Pins

1.2-V LVCMOS

2, 4, 6, 8, 10,12

2, 4, 6, 8,10

1.5-V LVCMOS

2, 4, 6, 8, 10, 12,16

1.8-V LVTTL/LVCMOS

2, 4, 6, 8, 10, 12,16

2.5-V LVTTL/LVCMOS

4, 8, 12,16

3.0-V LVCMOS

4, 8, 12,16

3.0-V LVTTL

4, 8, 12,16

3.3-V LVCMOS (2)

3.3-V LVTTL (2)

4, 8

HSTL-12 Class I

8, 10,12

8, 10

HSTL-12 Class II

—

HSTL-15 Class I

8, 10, 12

HSTL-15 Class II

HSTL-18 Class I

8, 10, 12

HSTL-18 Class II

SSTL-18 Class I

8, 10, 12

SSTL-18 Class II

12, 16

SSTL-2 Class I

8, 12

SSTL-2 Class II

BLVDS

8, 12, 16

Notes to Table 6–1:

(1) The default setting in the Quartus II software is 50-

 OCT without calibration for all non-voltage reference and

HSTL/SSTL Class I I/O standards. The default setting is 25-

 OCT without calibration for HSTL/SSTL Class II I/O

standards.

(2) The default current setting in the Quartus II software is highlighted in bold italic for 3.3-V LVTTL and 3.3-V LVCMOS

I/O standards.

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