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CDPCLK4 Scheda tecnica(PDF) 182 Page - Altera Corporation

Il numero della parte CDPCLK4
Spiegazioni elettronici  Cyclone III Device Handbook
PDF  274 Pages
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Produttore elettronici  ALTERA [Altera Corporation]
Homepage  http://www.altera.com
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CDPCLK4 Scheda tecnica(HTML) 182 Page - Altera Corporation

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9–24
Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family
Configuration Features
Cyclone III Device Handbook
August 2012
Altera Corporation
Volume 1
AP Configuration Supported Flash Memory
The AP configuration controller in Cyclone III devices is designed to interface with
the Micron P30 Parallel NOR flash family and the Micron P33 Parallel NOR flash
family, which are two industry standard flash families. Unlike serial configuration
devices, both of the flash families supported in the AP configuration scheme are
designed to interface with microprocessors. By configuring from an industry standard
microprocessor flash which allows access to the flash after entering user mode, the AP
configuration scheme allows you to combine configuration data and user data
(microprocessor boot code) on the same flash memory.
The Micron P30 and P33 flash families support a continuous synchronous burst read
mode at 40 MHz DCLK frequency for reading data from the flash. Additionally, the
Micron P30 and P33 flash families have identical pin-out and adopt similar protocols
for data access.
1 Cyclone III devices use a 40-MHz oscillator for the AP configuration scheme.
Table 9–11 lists the supported families of the commodity parallel flash for the AP
configuration scheme.
The AP configuration scheme of Cyclone III devices supports the Micron P30 and P33
family 64-, 128-, and 256-Mbit flash memories. Configuring Cyclone III devices from
the Micron P30 and P33 family 512-Mbit flash memory is possible, but you must
properly drive the extra address and FLASH_nCE pins as required by these flash
memories.
1 You must refer to the respective flash data sheets to check for supported speed grades
and package options.
The AP configuration scheme in Cyclone III devices supports flash speed grades of
40 MHz and above. However, the AP configuration for all these speed grades must be
capped at 40 MHz. The advantage of faster speed grades is realized when your design
in the Cyclone III device accesses flash memory in user mode.
f For more information about the operation of the Micron P30 Parallel NOR and P33
flash memories, search for the keyword “P30” or “P33” on the Micron website
(www.micron.com) to obtain the P30 or P33 family data sheet.
Table 9–11. Supported Commodity Flash for the AP Configuration Scheme for Cyclone III
Devices (1)
Flash Memory Density
Micron P30 Flash Family (2)
Micron P33 Flash Family (3)
64 Mbit
vv
128 Mbit
vv
256 Mbit
vv
Notes to Table 9–11:
(1) The AP configuration scheme only supports flash memory speed grades of 40 MHz and above.
(2) 3.3- , 3.0-, 2.5-, and 1.8-V I/O options are supported for the Micron P30 flash family.
(3) 3.3-, 3.0- and 2.5-V I/O options are supported for the Micron P33 flash family.



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