CDPCLK4 datasheet(239/274 Pages) ALTERA

239 / 274 page

Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family

9–81

Remote System Upgrade

August 2012

Altera Corporation

Cyclone III Device Handbook

Volume 1

Remote System Upgrade Registers

The remote system upgrade block contains a series of registers that stores the

configuration addresses, watchdog timer settings, and status information. These

registers are listed in Table 9–26.

The control and status registers of the remote system upgrade are clocked by the

10-MHz internal oscillator (the same oscillator that controls the user watchdog timer).

However, the shift and update registers of the remote system upgrade are clocked by

the maximum frequency of 40-MHz user clock input (RU_CLK). There is no minimum

frequency for RU_CLK.

Remote System Upgrade Control Register

The remote system upgrade control register stores the application configuration

address, the user watchdog timer settings, and option bits for application

configuration. In remote update mode for the AS configuration scheme, the control

configuration. In remote update mode for the AP configuration scheme, the control

load the AP default factory configuration. However, for the AP configuration scheme,

you can change the default factory configuration address to any desired address using

the APFC_BOOT_ADDR JTAG instruction. Additionally, a factory configuration in remote

update mode has write access to this register.

Table 9–26. Remote System Upgrade Registers

Description

Shift register

This register is accessible by the logic array and allows the update, status, and control registers to be

written and sampled by user logic. Write access is enabled in remote update mode for factory

configurations to allow writes to the update register. Write access is disabled for all application

configurations in remote update mode.

Control register

This register contains the current configuration address, the user watchdog timer settings, one option

bit for checking early CONF_DONE, and one option bit for selecting the internal oscillator as the startup

state machine clock. During a read operation in an application configuration, this register is read into the

shift register. When a reconfiguration cycle is started, the contents of the update register are written into

the control register.

Update register

This register contains data similar to that in the control register. However, it can only be updated by the

factory configuration by shifting data into the shift register and issuing an update operation. When a

reconfiguration cycle is triggered by the factory configuration, the control register is updated with the

contents of the update register. During a read in a factory configuration, this register is read into the shift

Status register

This register is written to by the remote system upgrade circuitry on every reconfiguration to record the

cause of the reconfiguration. This information is used by the factory configuration to determine the

appropriate action following a reconfiguration. During a capture cycle, this register is read into the shift

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