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ADSP-BF705BBCZ-4 Scheda tecnica(PDF) 45 Page - Analog Devices |
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ADSP-BF705BBCZ-4 Scheda tecnica(HTML) 45 Page - Analog Devices |
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45 / 116 page ![]() Rev. A | Page 45 of 116 | September 2015 ADSP-BF700/701/702/703/704/705/706/707 PB_12 I/O A none none none none none VDD_EXT Desc: SPI2 Master Out, Slave In | TRACE0 Trace Data 3 | SMC0 Data 12 | SYS Power Saving Mode Wakeup 2 Notes: If hibernate mode is used, one of the following must be true during hibernate. Either this pin must be actively driven by another IC, or it must have a pull-up or pull-down. PB_13 I/O A none none none none none VDD_EXT Desc: SPI2 Data 2 | UART1 Request to Send | TRACE0 Trace Data 2 | SMC0 Data 13 Notes: No notes. PB_14 I/O A none none none none none VDD_EXT Desc: SPI2 Data 3 | UART1 Clear to Send | TRACE0 Trace Data 1 | SMC0 Data 14 Notes: No notes. PB_15 I/O A none none none none none VDD_EXT Desc: SPI2 Slave Select Output 1 | TRACE0 Trace Data 0 | SMC0 Data 15 | SPI2 Slave Select Input Notes: SPI slave select outputs require a pull-up when used. PC_00 I/O A none none none none none VDD_EXT Desc: UART1 Transmit | SPT0 Channel A Data 1 | PPI0 Data 15 Notes: No notes. PC_01 I/O A none none none none none VDD_EXT Desc: UART1 Receive | SPT0 Channel B Data 1 | PPI0 Data 14 | SMC0 Address 9 | TM0 Alternate Capture Input 4 Notes: No notes. PC_02 I/O A none none none none none VDD_EXT Desc: UART0 Request to Send | CAN0 Receive | PPI0 Data 13 | SMC0 Address 10 | SYS Power Saving Mode Wakeup 3 | TM0 Alternate Capture Input 5 Notes: If hibernate mode is used, one of the following must be true during hibernate. Either this pin must be actively driven by another IC, or it must have a pull-up or pull-down. PC_03 I/O A none none none none none VDD_EXT Desc: UART0 Clear to Send | CAN0 Transmit | PPI0 Data 12 | SMC0 Address 11 | TM0 Alternate Capture Input 0 Notes: No notes. PC_04 I/O A none none none none none VDD_EXT Desc: SPT0 Channel B Clock | SPI0 Clock | MSI0 Data 1 | SMC0 Address 12 | TM0 Alternate Clock 0 Notes: An external pull-up may be required for MSI modes, see the MSI chapter in the hardware reference for details. Table 15. ADSP-BF70x Designer Quick Reference (Continued) Signal Name Type Driver Type Int Term Reset Term Reset Drive Hiber Term Hiber Drive Power Domain Description and Notes |
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