MX66L51235FMI-10G datasheet(15/83 Pages) MCNIX

Il numero della parte	MX66L51235FMI-10G

Spiegazioni elettronici	3V, 512M-BIT [x 1/x 2/x 4] CMOS MXSMIO짰 (SERIAL MULTI I/O) FLASH MEMORY

PDF	83 Pages

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Produttore elettronici	MCNIX [Macronix International]

Homepage	http://www.macronix.com

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15 / 83 page

MX66L51235F

Rev. 1.1, August 02, 2016

P/N: PM1832

8-1. Address Protocol

The original 24 bit address protocol of serial Flash can only access density size below 128Mb. For the memory

above 128Mb, the 32bit address is requested for access higher memory size. The MX66L51235F has three different

methods ot access the whole density:

(1)Command entry 4-byte address mode

(2)Extended Address Register (EAR)

(3)4-byte Address Command Set

Enter 4-Byte Address Mode

In 4-byte Address mode, all instructions are 32-bits address clock cycles. Two dedicated instructions are available

to enter/exit this modality:

● Enter 4-byte address mode (EN4B)

● Exit 4-byte address mode (EX4B)

When 4-byte address mode is enabled, the EAR<1-0> becomes "don't care" for all instructions requiring 4-byte

address.

Extended Address Register (Configurable)

The device provides an 8-bit volatile register for extended Address Register: it indentifies the extended address

(A31~A24) above 128Mb density by using original 3-byte address.

Extended Address Register (EAR)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

A31

A30

A29

A28

A27

A26

A25

A24

For the MX66L51235F the A31 to A26 are Don’t Care. During EAR, reading these bits will read as 0. The bit <1-0>

is default as "0".

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