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MX66L51235FMI-10G Scheda tecnica(PDF) 23 Page - Macronix International

Il numero della parte MX66L51235FMI-10G
Spiegazioni elettronici  3V, 512M-BIT [x 1/x 2/x 4] CMOS MXSMIO짰 (SERIAL MULTI I/O) FLASH MEMORY
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Produttore elettronici  MCNIX [Macronix International]
Homepage  http://www.macronix.com
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MX66L51235FMI-10G Scheda tecnica(HTML) 23 Page - Macronix International

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MX66L51235F
Rev. 1.1, August 02, 2016
P/N: PM1832
9-1. Write Enable (WREN)
The Write Enable (WREN) instruction is for setting Write Enable Latch (WEL) bit. For those instructions like PP/
PP4B, 4PP/4PP4B, SE/SE4B, BE32K/BE32K4B, BE/BE4B, CE, and WRSR, which are intended to change the
device content WEL bit should be set every time after the WREN instruction setting the WEL bit.
The sequence of issuing WREN instruction is: CS# goes low→sending WREN instruction code→ CS# goes high.
Both SPI (8 clocks) and QPI (2 clocks) command cycle can accept by this instruction. The SIO[3:1] are don't care in
SPI mode.
Figure 7. Write Enable (WREN) Sequence (SPI Mode)
2
1
34567
High-Z
0
06h
Command
SCLK
SI
CS#
SO
Mode 3
Mode 0
Figure 8. Write Enable (WREN) Sequence (QPI Mode)
SCLK
SIO[3:0]
CS#
06h
0
1
Command
Mode 3
Mode 0



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