MX66L51235FMI-10G datasheet(26/83 Pages) MCNIX

26 / 83 page

MX66L51235F

Rev. 1.1, August 02, 2016

P/N: PM1832

9-4. Release from Deep Power-down (RDP), Read Electronic Signature (RES)

The Release from Deep Power-down (RDP) instruction is completed by driving Chip Select (CS#) High. When Chip

Select (CS#) is driven High, the device is put in the Stand-by Power mode. If the device was not previously in the

Deep Power-down mode, the transition to the Stand-by Power mode is immediate. If the device was previously in

the Deep Power-down mode, though, the transition to the Stand-by Power mode is delayed by tRES2, and Chip

Select (CS#) must remain High for at least tRES2(max), as specified in Table 17 AC Characteristics. Once in the

Stand-by Power mode, the device waits to be selected, so that it can receive, decode and execute instructions. The

RDP instruction is only for releasing from Deep Power Down Mode. Reset# pin goes low will release the Flash from

deep power down mode.

RES instruction is for reading out the old style of 8-bit Electronic Signature, whose values are shown as Table 6 ID

Definitions. This is not the same as RDID instruction. It is not recommended to use for new design. For new design,

please use RDID instruction.

Even in Deep power-down mode, the RDP and RES are also allowed to be executed, only except the device is in

progress of program/erase/write cycle; there's no effect on the current program/erase/write cycle in progress.

Both SPI (8 clocks) and QPI (2 clocks) command cycle can accept by this instruction. The SIO[3:1] are don't care

when during SPI mode.

The RES instruction is ended by CS# goes high after the ID been read out at least once. The ID outputs repeatedly

if continuously send the additional clock cycles on SCLK while CS# is at low. If the device was not previously in

Deep Power-down mode, the device transition to standby mode is immediate. If the device was previously in Deep

Power-down mode, there's a delay of tRES2 to transit to standby mode, and CS# must remain to high at least

tRES2(max). Once in the standby mode, the device waits to be selected, so it can be receive, decode, and execute

instruction.

Figure 12. Read Electronic Signature (RES) Sequence (SPI Mode)

345678 9 10

28 29 30 31 32 33 34 35

22 21

3210

36 37 38

76543 2

High-Z

Electronic Signature Out

3 Dummy Bytes

MSB

Stand-by Mode

Deep Power-down Mode

MSB

tRES2

SCLK

CS#

ABh

Command

Mode 3

Mode 0

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