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ADIN1300CCPZ-R7 Scheda tecnica(PDF) 70 Page - Analog Devices

Il numero della parte ADIN1300CCPZ-R7
Spiegazioni elettronici  Robust, Industrial, Low Latency and Low Power 10 Mbps
PDF  79 Pages
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
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ADIN1300CCPZ-R7 Scheda tecnica(HTML) 70 Page - Analog Devices

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ADIN1300
Data Sheet
Rev. 0 | Page 70 of 79
Cable Diagnostics Results 2 Register
Address: 0xBA1F, Reset: 0x0000, Name: CDIAG_DTLD_RSLTS_2
This register provides cable diagnostics results for Pair 2.
Table 107. Bit Descriptions for CDIAG_DTLD_RSLTS_2
Bits
Bit Name
Description
Reset
Access
[15:11]
RESERVED
Reserved.
0x0
R
10
CDIAG_RSLT_2_BSY
When set, this bit indicates that Pair 2 is busy. This bit indicates that there was
unknown activity on Pair 2 during cable diagnostics.
0x0
R
9
CDIAG_RSLT_2_XSIM_3
When set, this bit indicates that there is a significant impedance cross pair short
between Pair 2 and Pair 3.
0x0
R
8
CDIAG_RSLT_2_XSIM_1
When set, this bit indicates that there is a significant impedance cross pair short
between Pair 2 and Pair 1.
0x0
R
7
CDIAG_RSLT_2_XSIM_0
When set, this bit indicates that there is a significant impedance cross pair short
between Pair 2 and Pair 0.
0x0
R
6
CDIAG_RSLT_2_SIM
When set, this bit indicates that there is a significant impedance mismatch on Pair 2.
0x0
R
5
CDIAG_RSLT_2_XSHRT_3
When set, this bit indicates that there is a cross pair short between Pair 2 and Pair 3.
0x0
R
4
CDIAG_RSLT_2_XSHRT_1
When set, this bit indicates that there is a cross pair short between Pair 2 and Pair 1.
0x0
R
3
CDIAG_RSLT_2_XSHRT_0
When set, this bit indicates that there is a cross pair short between Pair 2 and Pair 0.
0x0
R
2
CDIAG_RSLT_2_SHRT
When set, this bit indicates that there is a short on Pair 2.
0x0
R
1
CDIAG_RSLT_2_OPN
When set, this bit indicates that there is an open on Pair 2.
0x0
R
0
CDIAG_RSLT_2_GD
When set, this bit indicates that Pair 2 is well terminated.
0x0
R
Cable Diagnostics Results 3 Register
Address: 0xBA20, Reset: 0x0000, Name: CDIAG_DTLD_RSLTS_3
This register provides cable diagnostics results for Pair 3.
Table 108. Bit Descriptions for CDIAG_DTLD_RSLTS_3
Bits
Bit Name
Description
Reset
Access
[15:11]
RESERVED
Reserved.
0x0
R
10
CDIAG_RSLT_3_BSY
When set, this bit indicates that Pair 3 is busy. This bit indicates that there was
unknown activity on Pair 3 during cable diagnostics.
0x0
R
9
CDIAG_RSLT_3_XSIM_2
When set, this bit indicates that there is a significant impedance cross pair short
between Pair 3 and Pair 2.
0x0
R
8
CDIAG_RSLT_3_XSIM_1
When set, this bit indicates that there is a significant impedance cross pair short
between Pair 3 and Pair 1.
0x0
R
7
CDIAG_RSLT_3_XSIM_0
When set, this bit indicates that there is a significant impedance cross pair short
between Pair 3 and Pair 0.
0x0
R
6
CDIAG_RSLT_3_SIM
When set, this bit indicates that there is a significant impedance mismatch on Pair 3.
0x0
R
5
CDIAG_RSLT_3_XSHRT_2
When set, this bit indicates that there is a cross pair short between Pair 3 and Pair 2.
0x0
R
4
CDIAG_RSLT_3_XSHRT_1
When set, this bit indicates that there is a cross pair short between Pair 3 and Pair 1.
0x0
R
3
CDIAG_RSLT_3_XSHRT_0
When set, this bit indicates that there is a cross pair short between Pair 3 and Pair 0.
0x0
R
2
CDIAG_RSLT_3_SHRT
When set, this bit indicates that there is a short on Pair 3.
0x0
R
1
CDIAG_RSLT_3_OPN
When set, this bit indicates that there is an open on Pair 3.
0x0
R
0
CDIAG_RSLT_3_GD
When set, this bit indicates that Pair 3 is well terminated.
0x0
R



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