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FT93x Datasheet Embedded Microcontroller Datasheet

Version 1.5

Document Reference No.: BRT_000051

Clearance No.: BRT#049

Function Description

4.1

Architectural Overview

The FT93x series embedded microcontroller includes a high performance 32-bit FT32B RISC core

processor and a D2XX hardware engine.

There is a 128KB high speed Flash memory for software program download with One-Wire debugger

interface. The core processor uses a 32-bit I/O system bus to connect to all of the peripherals.



32-bit MCU Processor Core



D2XX hardware engine



128kB Flash Memory



128kB Program Memory



32kB Data RAM



USB2.0 Device Controller

- Control Endpoint 0 (8B to 64B)

- Data Endpoints 1 ~ 15 (8,128B)



BCD (Battery Charging Detection)



Real Time Clock



One-Wire debugger interface



One SPI Master interface



One SPI Slave interface or SD Host Controller



One I2C Master or one I2C Slave interface (3.4Mbps)



Four programmable 8Mbit/s UARTs



Four 16-bit timers and one 32-bit watchdog timer



8-Channel PWM with optional 2-Channel Audio PCM



10-bit two channel 1MS/s DAC



8-bit three channel 460KS/s ADC



General purpose I/O interface

The functions for each controller / interface are briefly described in the following subsections.

4.2

FT32B Core Processor

The FT32B core processor runs at frequencies of up to 100MHz. The processor contains the CPU itself

with control logic and its 128kB program memory and 32kB data memory. The outside connections for

the core processor are the memory-mapped I/O interface, the interrupt interface, asynchronous reset,

and the system clock.

4.3

D2XX Hardware Engine

The built-in D2XX hardware engine reduces the FT93x processor load of handling the USB protocol and

software complexity. When the D2XX hardware engine is enabled and takes over the control of the USB

Device interface, the FT93x enumerates as a multiple interface, bi-directional D2XX USB Device which is

supported on most common platforms with a D2XX driver. The data transfer from the main processor to

the USB is through the FT93x D2XX FIFO interface. It supports up to 7 FIFO channels, each

corresponding to a D2XX interface.

Each channel has dedicated read and write pipes. There are a total of 14 pipes and 8,192B(8kB) of

memory is reserved for the read and the write pipes. The maximum transfer size on a channel may be

flexibly allocated as 2 to 4094 bytes across the D2XX FIFO interfaces 1 to 7.

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