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FT930Q-R Scheda tecnica(PDF) 47 Page - Bridgetek Pte Ltd. |
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FT930Q-R Scheda tecnica(HTML) 47 Page - Bridgetek Pte Ltd. |
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47 / 65 page  Copyright © Bridgetek Pte Ltd 47 FT93x Datasheet Embedded Microcontroller Datasheet Version 1.5 Document Reference No.: BRT_000051 Clearance No.: BRT#049 I2C Bus I/O pins dynamic characteristics (Vcc (I/O) = 3.3V) Parameter Description Standard mode (SM) Fast mode (FM) Fast mode Plus (FM+) High Speed mode (HS) Unit Min Max Min Max Min Max Min Max FSCL SCL clock frequency 0 100 0 400 0 1000 0 3400 kHz TSCLL SCL clock low period 4.7 - 1.3 - 0.5 - 0.320 - µs TSCLH SCL clock high period 4.0 - 0.6 - 0.26 - 0.120 - µs TSU Data setup time 250 - 100 - 50 - 10 - ns THD Data hold time 0 - 0 - 0 - 0 150 ns Tr Rise time - 1000 - 300 - 120 20 160 ns TrCL1 Rise time 1st clock after Sr and after ack (HS) 20 160 ns TrCL Rise time clock (HS) 20 80 ns Tf Fall time - 300 - 300 - 120 20 80 (SCL) 160 (SDA) ns Table 5-8 I2C I/O pins (I2C0_SCL/SDA, I2C1_SCL/SDA) characteristics Figure 5-2 Definition of I2C Timing F/S mode |
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