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L9965P Scheda tecnica(PDF) 57 Page - STMicroelectronics |
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L9965P Scheda tecnica(HTML) 57 Page - STMicroelectronics |
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57 / 104 page ![]() Symbol Parameter Test condition Min Typ Max Unit Pin ΔVER_CAP ER cap discharge voltage due to capacitance 0.4 - 0.7 V ERBST ΔVER_ESR ER cap discharge voltage due to ESR Design info 0.1 - 0.45 V ERBST tER_CAP_DIAG1 ER cap diag total running time Design info with 100 µF VERBST = 20 V, RDCHG = 62 Ω - 0.63 - ms ERBST ERDCHSW tER_CAP_DIAG2 ER cap diag total running time Design info with 1.2 mF VERBST = 20 V, RDCHG = 62 Ω - 2.3 - ms ERBST ERDCHSW LSBESR ESR/RERDCHSW Design info - 38.52 - m - LSBC RERDCHSW*CER Design info - 25.35 - mF*W - tS_ER_CAP Sample time of each conversion on voltage ADCs Design info - 64 - ms - tLOCK_ER Time needed for tSTART conversion Design info - 464 - ms - tER_MEAS_DELAY Time to reach steady state after ERDCHSW enabled Design info - 64 - ms - tER_CAP_DIAG_TO ER cap diag timeout Design info - - 25 ms - 3.8 Voltage ADC The IC implements a multichannel, fully differential 10-bit ADC for internal and external voltage measurements. The ADC supports the following 7 inputs: • PS, PF, PR, PGND, used for on-demand conversions and by the diagnostic routine • VRCM, used by the diagnostic routine • ERBST, used for on-demand conversions and by the diagnostic routine • GND, used for on-demand conversions and by the diagnostic routine The ADC is designed to convert any of the following 7 paths: • PS vs PGND • PF vs PGND • PR vs PGND • PF vs PR in high resolution (pre-deployment), with IPF_PU and IPR_PD enabled • PF vs PR in low resolution (post deployment), with IPF_PU and IPR_PD enabled • ERBST vs GND • VRCM vs GND (VRCM enabled) The ADC conversion formula is the following: VADC=LSB×CODE (8) Where LSB is VADC_LSB_x (according to conversion requested) and CODE is a 10-bit signed word. L9965P Functional description DS14702 - Rev 4 page 57/104 |
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