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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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L9965P Scheda tecnica(PDF) 32 Page - STMicroelectronics |
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L9965P Scheda tecnica(HTML) 32 Page - STMicroelectronics |
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32 / 104 page  3.6.1.5 FENH/FENL diagnostics Table 20. FENH/FENL diagnostics Fault type Assertion condition IC reaction to assertion Release condition IC reaction to flag clear Maskable FENx high frequency When in PWM mode (FENx_MODE = 1) if the input signal period becomes lower than high threshold the high frequency fault is acknowledged The FENx_HIGH_FREQ flag is set FAULTN line is asserted NFENx_FAULT_PERIOD counter is decremented by 1 If the input signal period becomes lower than high threshold the fault flag can be cleared by MCU FAULTN line is released FENx_MODE = 0 masks diagnostic execution. When disabled, the FENx_HIGH_FREQ flag can always be cleared by the MCU. FENX_HIGH_FREQ_FAULTN_MSK masks fault redirection on FAULTN pin FENx low frequency When in PWM mode (FENx_MODE = 1) if the input signal period is between low and timeout thresholds the low frequency fault is acknowledged The FENx_LOW_FREQ flag is set FAULTN line is asserted NFENx_FAULT_PERIOD counter is decremented by 1 If the input signal period becomes higher than low threshold the fault flag can be cleared by MCU FAULTN line is released FENx_MODE = 0 masks diagnostic execution. When disabled, the FENx_LOW_FREQ flag can always be cleared by the MCU. FENX_LOW_FREQ_FAULTN_MSK masks fault redirection on FAULTN pin FENx timeout in PWM mode When in PWM mode (FENx_MODE = 1) if the input signal period becomes lower than timeout threshold the PWM timeout fault is acknowledged The FENx_PWM_TIMEOUT flag is set FAULTN line is asserted NFENx_FAULT_PERIOD counter is reset (but not stopped) If the input signal period becomes higher than timeout threshold the fault flag can be cleared by MCU FAULTN line is released FENx_MODE = 0 masks diagnostic execution. When disabled, the FENx_PWM_TIMEOUT flag can always be cleared by MCU. FENX_TIMEOUT_FAULTN_MSK masks fault redirection on FAULTN pin FENx timeout in level mode When in Level mode (FENx_MODE = 0), following a FAULTN pulse, the FENx input signal is expected to exhibit two edges within tFENx_TIMEOUT. If this does not happen, the level timeout fault is acknowledged The FENx_LEV_TIMEOUT flag is set FAULTN line is asserted The fault flag can always be cleared by the MCU FAULTN line is released FENx_MODE = 1 masks diagnostic execution. When disabled, the FENx_LEV_TIMEOUT flag can always be cleared by MCU. FENx_INT_CHECK_EN = 0 masks diagnostic execution. When disabled, the FENx_LEV_TIMEOUT flag can always be cleared by MCU. FENX_TIMEOUT_FAULTN_MSK masks fault redirection on FAULTN pin L9965P Functional description DS14702 - Rev 4 page 32/104 |
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