L9965P datasheet(62/104 Pages) STMICROELECTRONICS

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3.11

Internal monitors

To guarantee the correct behavior of all the analog circuitry, the IC implements two identical and independent

reference generators. They constantly monitor each other while in DIAG, NORMAL and ARM states. In case of

failure, FAULTN pin is asserted, BIAS_WARNING bit in the INTERNAL_STATUS register is set and the

deployment is inhibited by the “fire inhibit” signal.

There are also two voltage monitors on 3.3 V internal sleep regulator:

•

In case an OV event occurs, FAULTN pin is asserted and the V3V3_SLEEP_OV bit in the

INTERNAL_STATUS register is set, but the deployment is not inhibited.

•

In case an UV event occurs, FAULTN pin is asserted and V3V3_SLEEP_UV bit in INTERNAL_STATUS

In case there is a supply loss meanwhile the IC is in DEEP-SLEEP state, the NPOR_SLEEP_EVENT bit in the

INTERNAL_STATUS register is set.

3.12

Die temperature (TJ) monitor

The IC constantly monitors the junction temperature (TJ) by means of an embedded sensor placed away from the

power stage.

Junction temperature measurement is stored in the TEMPERATURE register and can be computed according to

the following formula:

TJ°C =1.74192×TEMPERATURE_CODE−89.988

(9)

3.12.1

Die temperature monitor electrical parameters

All parameters are tested and guaranteed in the following conditions, unless otherwise noted: all supplies

according to the Table 3; TJ according to the Table 2.

Table 37. Die temperature monitor electrical parameters

Symbol

Parameter

Min

Typ

Max

Unit

TJ_ERR

Die temperature total conversion error

-10

°C

L9965P

Functional description

DS14702 - Rev 4

page 62/104

L9965P Scheda tecnica(PDF) 62 Page - STMicroelectronics